Patents by Inventor Thomas Witters

Thomas Witters has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for fabricating a dual work function semiconductor device and the device made thereof
    Patent number: 9024299
    Abstract: A method for manufacturing a dual work function semiconductor device and the device made thereof are disclosed. In one aspect, a method includes providing a gate dielectric layer over a semiconductor substrate. The method further includes forming a metal layer over the gate dielectric layer. The method further includes forming a layer of gate filling material over the metal layer. The method further includes patterning the gate dielectric layer, the metal layer and the gate filling layer to form a first and a second gate stack. The method further includes removing the gate filling material only from the second gate stack thereby exposing the underlying metal layer. The method further includes converting the exposed metal layer into an metal oxide layer. The method further includes reforming the second gate stack with another gate filling material.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: May 5, 2015
    Assignees: IMEC, Taiwan Semiconductor Manufacturing Company, Ltd., Katholieke Universiteit Leuven
    Inventors: Zilan Li, Joshua Tseng, Thomas Witters, Stefan De Gendt
  • METHOD FOR FABRICATING A DUAL WORK FUNCTION SEMICONDUCTOR DEVICE AND THE DEVICE MADE THEREOF
    Publication number: 20100109095
    Abstract: A method for manufacturing a dual work function semiconductor device and the device made thereof are disclosed. In one aspect, a method includes providing a gate dielectric layer over a semiconductor substrate. The method further includes forming a metal layer over the gate dielectric layer. The method further includes forming a layer of gate filling material over the metal layer. The method further includes patterning the gate dielectric layer, the metal layer and the gate filling layer to form a first and a second gate stack. The method further includes removing the gate filling material only from the second gate stack thereby exposing the underlying metal layer. The method further includes converting the exposed metal layer into an metal oxide layer. The method further includes reforming the second gate stack with another gate filling material.
    Type: Application
    Filed: October 13, 2009
    Publication date: May 6, 2010
    Applicants: IMEC, Taiwan Semiconductor Manufacturing Company, Ltd., Katholieke Universiteit Leuven
    Inventors: Zilan Li, Joshua Tseng, Thomas Witters, Stefan De Gendt