Patents by Inventor Thomas Witters

Thomas Witters has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9024299
    Abstract: A method for manufacturing a dual work function semiconductor device and the device made thereof are disclosed. In one aspect, a method includes providing a gate dielectric layer over a semiconductor substrate. The method further includes forming a metal layer over the gate dielectric layer. The method further includes forming a layer of gate filling material over the metal layer. The method further includes patterning the gate dielectric layer, the metal layer and the gate filling layer to form a first and a second gate stack. The method further includes removing the gate filling material only from the second gate stack thereby exposing the underlying metal layer. The method further includes converting the exposed metal layer into an metal oxide layer. The method further includes reforming the second gate stack with another gate filling material.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: May 5, 2015
    Assignees: IMEC, Taiwan Semiconductor Manufacturing Company, Ltd., Katholieke Universiteit Leuven
    Inventors: Zilan Li, Joshua Tseng, Thomas Witters, Stefan De Gendt
  • Patent number: 8296074
    Abstract: A method for clustering melting profiles of a plurality of nucleic acid samples, comprising measuring the fluorescence of each nucleic acid sample as a function of temperature to produce a respective raw melting curve for each respective nucleic acid sample, and clustering genotypes of the plurality of nucleic acid samples to form a plurality of clusters of melting curves. A system for analyzing a plurality of nucleic acid samples comprising an instrument for sequentially heating fluorescently detectable complexes while monitoring their fluorescence, a central processing unit (CPU) for performing computer executable instructions, and a memory storage device for storing computer executable instructions that when executed by the CPU cause the CPU to cluster genotypes of a plurality of nucleic acid samples.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: October 23, 2012
    Assignee: University of Utah Research Foundation
    Inventors: Robert Andrew Palais, Carl Thomas Witter
  • Publication number: 20120116686
    Abstract: A method for clustering melting profiles of a plurality of nucleic acid samples, comprising measuring the fluorescence of each nucleic acid sample as a function of temperature to produce a respective raw melting curve for each respective nucleic acid sample, and clustering genotypes of the plurality of nucleic acid samples to form a plurality of clusters of melting curves. A system for analyzing a plurality of nucleic acid samples comprising an instrument for sequentially heating fluorescently detectable complexes while monitoring their fluorescence, a central processing unit (CPU) for performing computer executable instructions, and a memory storage device for storing computer executable instructions that when executed by the CPU cause the CPU to cluster genotypes of a plurality of nucleic acid samples.
    Type: Application
    Filed: October 12, 2011
    Publication date: May 10, 2012
    Inventors: Robert Andrew Palais, Carl Thomas Witter
  • Publication number: 20100109095
    Abstract: A method for manufacturing a dual work function semiconductor device and the device made thereof are disclosed. In one aspect, a method includes providing a gate dielectric layer over a semiconductor substrate. The method further includes forming a metal layer over the gate dielectric layer. The method further includes forming a layer of gate filling material over the metal layer. The method further includes patterning the gate dielectric layer, the metal layer and the gate filling layer to form a first and a second gate stack. The method further includes removing the gate filling material only from the second gate stack thereby exposing the underlying metal layer. The method further includes converting the exposed metal layer into an metal oxide layer. The method further includes reforming the second gate stack with another gate filling material.
    Type: Application
    Filed: October 13, 2009
    Publication date: May 6, 2010
    Applicants: IMEC, Taiwan Semiconductor Manufacturing Company, Ltd., Katholieke Universiteit Leuven
    Inventors: Zilan Li, Joshua Tseng, Thomas Witters, Stefan De Gendt