Patents by Inventor Thomas Y. Wong

Thomas Y. Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8610473
    Abstract: The loop bandwidth of a PLL is adjusted based on a difference between the output signal of the PLL and the PLL reference signal. In an embodiment, the DC open loop gain and natural frequency of the PLL are adjusted based on the phase difference between the output signal and the reference signal, so that the loop bandwidth of the PLL is increased when the phase difference is outside a programmable range and is decreased when the phase difference is within the programmable range.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: December 17, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Saeed Abbasi, Michael R. Foxcroft, Thomas Y. Wong
  • Publication number: 20130154695
    Abstract: Wafer sort data can be converted to binary data, whereby each integrated circuit of the wafer is assigned a value of one or zero, depending on whether test data indicates the integrated circuit complies with a specification. In addition, each integrated circuit is assigned position data to indicate its position on the wafer. A frequency transform, such as a multidimensional discrete Fourier transform (DFT), is applied to the binary wafer sort data and position data to determine a spatial frequency spectrum that indicates error patterns for the wafer. The spatial frequency spectrum can be analyzed to determine the characteristics of the wafer formation process that resulted in the errors, and the wafer formation process can be modified to reduce or eliminate the errors.
    Type: Application
    Filed: December 14, 2011
    Publication date: June 20, 2013
    Applicants: ADVANCED MICRO DEVICES, INC., ATI TECHNOLOGIES ULC
    Inventors: Saeed Abbasi, Michael R. Foxcroft, Thomas Y. Wong
  • Patent number: 8339200
    Abstract: An apparatus includes a telescopic operational amplifier. The telescopic operational amplifier includes an input stage, a load, and a first cascode circuit. The first cascode circuit is coupled to a first differential node and an output node. The first differential node is coupled to one of the input stage and the load. The apparatus includes a first negative transconductance circuit coupled to the first differential node. In at least one embodiment, the first negative transconductance circuit is operable to provide a negative transconductance to compensate at least a first component of an output resistance of the telescopic operational amplifier. In at least one embodiment, the first negative transconductance circuit includes a pair of cross-coupled devices coupled to the first differential node and a current source.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: December 25, 2012
    Assignee: ATI Technologies ULC
    Inventor: Thomas Y. Wong
  • Publication number: 20120139631
    Abstract: An apparatus includes a telescopic operational amplifier. The telescopic operational amplifier includes an input stage, a load, and a first cascode circuit. The first cascode circuit is coupled to a first differential node and an output node. The first differential node is coupled to one of the input stage and the load. The apparatus includes a first negative transconductance circuit coupled to the first differential node. In at least one embodiment, the first negative transconductance circuit is operable to provide a negative transconductance to compensate at least a first component of an output resistance of the telescopic operational amplifier. In at least one embodiment, the first negative transconductance circuit includes a pair of cross-coupled devices coupled to the first differential node and a current source.
    Type: Application
    Filed: December 7, 2010
    Publication date: June 7, 2012
    Inventor: Thomas Y. Wong
  • Patent number: 7602234
    Abstract: In an embodiment, a bias generator circuit comprises a first circuit and a second circuit. The first circuit includes a first input coupled to a voltage source and a first output that provides a first output current having a substantially non-zero temperature coefficient. The first circuit comprises a first transistor and a second transistor. The second circuit includes a second input that receives the first output current from the first circuit and a second output that provides a second output current. The second circuit comprises a third transistor and a fourth transistor. The second output current has a substantially zero temperature coefficient dependent on (i) a difference between an effective channel size of the first transistor and an effective channel size of the second transistor, and (ii) a difference between an effective channel size of the third transistor and an effective channel size of the fourth transistor.
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: October 13, 2009
    Assignee: ATI Technologies ULC
    Inventors: Thomas Y. Wong, Mikhail Rodionov
  • Publication number: 20090027106
    Abstract: In an embodiment, a bias generator circuit comprises a first circuit and a second circuit. The first circuit includes a first input coupled to a voltage source and a first output that provides a first output current having a substantially non-zero temperature coefficient. The first circuit comprises a first transistor and a second transistor. The second circuit includes a second input that receives the first output current from the first circuit and a second output that provides a second output current. The second circuit comprises a third transistor and a fourth transistor. The second output current has a substantially zero temperature coefficient dependent on (i) a difference between an effective channel size of the first transistor and an effective channel size of the second transistor, and (ii) a difference between an effective channel size of the third transistor and an effective channel size of the fourth transistor.
    Type: Application
    Filed: July 24, 2007
    Publication date: January 29, 2009
    Applicant: ATI Technologies, ULC
    Inventors: Thomas Y. Wong, Mikhail Rodionov
  • Patent number: 5550513
    Abstract: A fully differential distributed amplifier for providing a high frequency, high power output. The inherent base-collector capacitance of the output power transistors of each distributed amplifier is matched with on-chip inductances to create artificial transmission lines for both the input and output paths. The distributed amplifier circuit may be used as a driver for a Mach-Zehnder optical modulator. In this application an output of 3 V peak-to-peak per modulator arm is delivered at 10 Gb/s.
    Type: Grant
    Filed: June 22, 1995
    Date of Patent: August 27, 1996
    Assignee: Northern Telecom Limited
    Inventor: Thomas Y. Wong
  • Patent number: 5396125
    Abstract: A 2-level logic `current injection` circuit topology suitable for heterojunction bipolar transistor (HBT) technology. The circuit requires lower supply voltage headroom and demonstrates smaller propagation delay than conventional 2-level emitter coupled logic/current mode logic (ECL/CML). Master-slave flip-flop circuits have been fabricated in AlGaAs/GaAs, HBT. Test results indicate that the circuits are fully functional at 10 Gbit/s and an operating clock frequency as high as 20 GHz is recorded.
    Type: Grant
    Filed: September 9, 1993
    Date of Patent: March 7, 1995
    Assignee: Northern Telecom Limited
    Inventor: Thomas Y. Wong
  • Patent number: 5324353
    Abstract: A method for increasing the optical transmission characteristics of zinc sulfide in the visible and infrared portions of electromagnetic spectrum is described. Materials such as metals and, in particular, transition metals are diffused through the zinc sulfide material over a duration of time sufficient to cause the material to turn substantially water clear and substantially colorless.
    Type: Grant
    Filed: December 3, 1992
    Date of Patent: June 28, 1994
    Assignee: Raytheon Company
    Inventors: Joseph M. Wahl, Randal W. Tustison, Thomas Y. Wong
  • Patent number: 5281465
    Abstract: A technique for increasing the strength of long wavelength infrared material, such as zinc sulfide and zinc selenide includes diffusing species which are applied to the materials as thin films into the zinc sulfide and zinc selenide material. Portions of the thin film material are thermally diffused to substantial depths of up to 100 microns below the depth of flaws formed in the body using one of two diffusion techniques. One diffusion technique uses hot isostatic pressure and the other uses a heat treatment carried out at or near ambient pressure in an inert atmosphere, such as argon or other suitable inert gas.
    Type: Grant
    Filed: October 30, 1992
    Date of Patent: January 25, 1994
    Assignee: Raytheon Company
    Inventors: Joseph M. Wahl, Randal W. Tustison, Thomas Y. Wong, Charles B. Willingham
  • Patent number: 4455820
    Abstract: A control system including a controller for reading temperature values from sensors in a gas turbine, determining the reliability of the sensors, and issuing a fuel control signal for use in controlling the turbine is disclosed. The fuel control signal has a calculated value which is a function of the turbine operating temperature derived from the values of temperature signals generated by the sensors.
    Type: Grant
    Filed: September 9, 1976
    Date of Patent: June 26, 1984
    Assignee: General Electric Company
    Inventors: Leo P. Buckley, Jr., Burnette P. Chausse, Arthur C. Chen, John N. Russell, Thomas Y. Wong
  • Patent number: 4277832
    Abstract: A fluid flow control system for controlling the flow of fluid through a valve is disclosed. The control system controls the flow of fluid through the valve by varying the position of the valve. The control system performs this function in such a manner that the change in position of the valve at all times remains sufficiently bounded so as to ensure that the actual flow of fluid through the valve is substantially equal to the flow predicted by the static flow equation for the valve.
    Type: Grant
    Filed: October 1, 1979
    Date of Patent: July 7, 1981
    Assignee: General Electric Company
    Inventor: Thomas Y. Wong