Patents by Inventor Thomas Zell

Thomas Zell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11897853
    Abstract: The present invention provides a process for preparing a compound of formula [I] from a compound of formula [II] using an oxidizing agent and a catalyst, the process is carried out at a low temperature.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: February 13, 2024
    Assignee: ADAMA MAKHTESHIM LTD.
    Inventors: Thomas Zell, Shlomi Cohen
  • Patent number: 11634397
    Abstract: The invention provides a process for preparing heterocyclic fluoroalkenyl sulfones and their thioether and sulfoxide precursors of the formula: Cl—R—S(O)n—(CH2)2—CF?CF2 (Formula I?) wherein R is a heterocyclic five-membered aromatic ring and n is 0, 1 or 2, comprising a step of dehalogenation of a compound of the formula: Cl—R—S(O)n—(CH2)2—CFX1—CF2X2 (Intermediate B), wherein X1 and X2 are independently halogen atoms, to remove said X1 and X2 atoms. Also included are novel intermediate compounds.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: April 25, 2023
    Assignee: ADAMA MAKHTESHIM LTD.
    Inventors: Thomas Zell, Shlomi Cohen
  • Publication number: 20220177444
    Abstract: A method is disclosed for preparing pyrazole derivative 3-bromo-5-methyl-1-H-pyrazole-N-2-chloropyridine (compound of Formula I) by reacting of a compound of Formula II with halogen substituted pyridine optionally in the presence of base and organic solvent or by decarboxylation of pyrazole carboxylic acid of Formula XI in the presence of acid. In addition, provided a method of preparation of synthetic precursors of Formula II, Formula IV, Formula V, Formula VI, Formula XI, and a method of preparing a compound of Formula VII comprising reacting a compound of Formula I with an oxidant optionally in the presence of a catalyst. Also disclosed a compound of Formula I as useful synthetic precursor for preparation of anthranilamide of Formula VIII.
    Type: Application
    Filed: April 16, 2020
    Publication date: June 9, 2022
    Inventors: Thomas ZELL, Jie LI, ltsik BAR-NAHUM, Avihai YACOVAN
  • Patent number: 11352335
    Abstract: The present invention provides an improved process for preparing 5-chloro-2-[(3,4,4-trifluoro-3-buten-1-yl)thio]-thiazole comprising reacting 2-[(3,4,4-trifluoro-3-buten-1-yl)thio]-thiazole with N-chlorosuccinimide (NCS) in the presence of water, the improvement comprising performing the step of reacting the compound of formula (II) with NCS in the presence of a reduced amount of water. The present invention provides an improved process for preparing 5-chloro-2-[(3, 4,4-trifluoro-3-buten-1-yl)thio]-thiazole comprising reacting 2-[(3, 4,4-trifluoro-3-buten-1-yl)thio]-thiazole with N-chlorosuccinimide (NCS) in the presence of water, the improvement comprising performing the step of reacting the compound of formula (II) with an excess molar amount of NCS.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: June 7, 2022
    Assignee: ADAMA MAKHTESHIM, LTD.
    Inventors: Thomas Zell, Boris Rubinov
  • Publication number: 20220002258
    Abstract: The invention provides a process for preparing heterocyclic fluoroalkenyl sulfones and their thioether and sulfoxide precursors of the formula: Cl—R—S(O)n—(CH2)2—CF?CF2 (Formula I?) wherein R is a heterocyclic five-membered aromatic ring and n is 0, 1 or 2, comprising a step of dehalogenation of a compound of the formula: Cl—R—S(O)n—(CH2)2—CFX1—CF2X2 (Intermediate B), wherein X1 and X2 are independently halogen atoms, to remove said X1 and X2 atoms. Also included are novel intermediate compounds.
    Type: Application
    Filed: September 26, 2019
    Publication date: January 6, 2022
    Inventors: Thomas ZELL, Shlomi COHEN
  • Publication number: 20210387955
    Abstract: The present invention provides a process for preparing a compound of formula [I] from a compound of formula [II] using an oxidizing agent and a catalyst, the process is carried out at a low temperature.
    Type: Application
    Filed: December 30, 2019
    Publication date: December 16, 2021
    Inventors: Thomas ZELL, Shlomi COHEN
  • Publication number: 20210070719
    Abstract: The present invention provides an improved process for preparing 5-chloro-2-[(3,4,4-trifluoro-3-buten-1-yl)thio]-thiazole comprising reacting 2-[(3,4,4-trifluoro-3-buten-1-yl)thio]-thiazole with N-chlorosuccinimide (NCS) in the presence of water, the improvement comprising performing the step of reacting the compound of formula (II) with NCS in the presence of a reduced amount of water. The present invention provides an improved process for preparing 5-chloro-2-[(3, 4,4-trifluoro-3-buten-1-yl)thio]-thiazole comprising reacting 2-[(3, 4,4-trifluoro-3-buten-1-yl)thio]-thiazole with N-chlorosuccinimide (NCS) in the presence of water, the improvement comprising performing the step of reacting the compound of formula (II) with an excess molar amount of NCS.
    Type: Application
    Filed: January 22, 2019
    Publication date: March 11, 2021
    Applicant: Adama Makhteshim, Ltd.
    Inventors: Thomas Zell, Boris Rubinov
  • Patent number: 10401159
    Abstract: An apparatus for detecting a pre-aligning element at a wafer and a method for pre-aligning a wafer are disclosed. In an embodiment, the apparatus includes a sensor arrangement configured to illuminate subsequent edge portions of the wafer edge and to output a first and a second sensor signal, wherein the first sensor signal is based on the transmitted fractions of the illumination and the second sensor signal is based on the reflected fractions of the illumination; and an evaluation unit configured to evaluate the first sensor signal and to determine a first position information indicating a coarse position of the pre-aligning element, and, after having determined the first position information, to determine a second position information based on the second sensor signal and the first position information, wherein the second position information indicates a fine position of the pre-aligning element.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: September 3, 2019
    Assignee: Infineon Technologies AG
    Inventors: Thomas Zell, Horst Kittner
  • Publication number: 20170010092
    Abstract: An apparatus for detecting a pre-aligning element at a wafer and a method for pre-aligning a wafer are disclosed. In an embodiment, the apparatus includes a sensor arrangement configured to illuminate subsequent edge portions of the wafer edge and to output a first and a second sensor signal, wherein the first sensor signal is based on the transmitted fractions of the illumination and the second sensor signal is based on the reflected fractions of the illumination; and an evaluation unit configured to evaluate the first sensor signal and to determine a first position information indicating a coarse position of the pre-aligning element, and, after having determined the first position information, to determine a second position information based on the second sensor signal and the first position information, wherein the second position information indicates a fine position of the pre-aligning element.
    Type: Application
    Filed: September 21, 2016
    Publication date: January 12, 2017
    Applicants: Infineon Technologies AG, Infineon Technologies AG
    Inventors: Thomas Zell, Horst Kittner
  • Patent number: 9476701
    Abstract: An apparatus detects a pre-aligning element at a wafer. The wafer has the pre-aligning element at a wafer edge. The apparatus includes a sensor arrangement and an evaluation unit. The sensor arrangement is configured to illuminate subsequent edge portions of the wafer edge, to receive transmitted fractions and reflected fractions of the illumination from the illuminated edge portions with an illumination sensor, and to output a first and a second sensor signal. The first sensor signal is based on the transmitted fractions of the illumination and the second sensor signal is based on the reflected fractions of the illumination. The evaluation unit is configured to evaluate the first sensor signal and to determine a first position information with respect to a coarse position of the pre-aligning element if the first sensor signal indicates that the transmitted fractions of the illumination has reached a predetermined threshold value.
    Type: Grant
    Filed: July 5, 2013
    Date of Patent: October 25, 2016
    Assignee: Infineon Technologies AG
    Inventors: Thomas Zell, Horst Kittner
  • Publication number: 20150009498
    Abstract: An apparatus detects a pre-aligning element at a wafer. The wafer has the pre-aligning element at a wafer edge. The apparatus includes a sensor arrangement and an evaluation unit. The sensor arrangement is configured to illuminate subsequent edge portions of the wafer edge, to receive transmitted fractions and reflected fractions of the illumination from the illuminated edge portions with an illumination sensor, and to output a first and a second sensor signal. The first sensor signal is based on the transmitted fractions of the illumination and the second sensor signal is based on the reflected fractions of the illumination. The evaluation unit is configured to evaluate the first sensor signal and to determine a first position information with respect to a coarse position of the pre-aligning element if the first sensor signal indicates that the transmitted fractions of the illumination has reached a predetermined threshold value.
    Type: Application
    Filed: July 5, 2013
    Publication date: January 8, 2015
    Inventors: Thomas Zell, Horst Kittner
  • Publication number: 20100040983
    Abstract: A method of manufacturing integrated circuits includes determining a process-induced displacement (e.g., a stress-induced displacement) between primary structures on a substrate and providing a photomask with mask features assigned to the primary structures. The distances between the mask features are set such that the process-induced displacement is compensated.
    Type: Application
    Filed: August 14, 2008
    Publication date: February 18, 2010
    Applicant: Qimonda AG
    Inventors: Heinrich Ollendorf, Thomas Zell, Michael Kubis, Steffen Schmidt, Elke Hietschold
  • Patent number: 7224439
    Abstract: The hydrodynamic effects—which occur during immersion lithography as a result of the movement of the semiconductor wafer—in a liquid preferably provided between the last lens surface of the projection system and the semiconductor wafer can be avoided by means of a movable illumination region for illuminating a cutout of a mask containing a structure to that can be imaged onto the semiconductor wafer. A scan movement of the mask and the semiconductor wafer can be either reduced or entirely avoided by means of a movement of the illumination region.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: May 29, 2007
    Assignee: Infineon Technologies AG
    Inventors: Martin Verhoeven, Thomas Zell
  • Publication number: 20050117135
    Abstract: The hydrodynamic effects—which occur during immersion lithography as a result of the movement of the semiconductor wafer—in a liquid preferably provided between the last lens surface of the projection system and the semiconductor wafer can be avoided by means of a movable illumination region for illuminating a cutout of a mask containing a structure to that can be imaged onto the semiconductor wafer. A scan movement of the mask and the semiconductor wafer can be either reduced or entirely avoided by means of a movement of the illumination region.
    Type: Application
    Filed: November 12, 2004
    Publication date: June 2, 2005
    Inventors: Martin Verhoeven, Thomas Zell
  • Patent number: 6737748
    Abstract: In the fabrication of stacked vias, metal islands referred to as landing pads are introduced for the purpose of contact-connection between the vias that are arranged one above the other. The metal islands project laterally beyond the vias to a significant extent on account of the line shortening effect. The vias arranged in layers lying one above the other are laterally offset with respect to one another. The landing pad of the invention is configured as an interconnect running between the vias. On account of the line shortening effect, which is less critical for longer tracks, contact areas provided at the ends of the interconnect do not have to be chosen to be as large as the square contact areas of conventional metal islands and can therefore be accommodated to save more space on a circuit layout to be miniaturized. The shrink factor of such a semiconductor structure is increased.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: May 18, 2004
    Assignee: Infineon Technologies AG
    Inventors: Lothar Bauch, Thomas Zell, Matthias Uwe Lehr, Albrecht Kieslich
  • Publication number: 20020117759
    Abstract: In the fabrication of stacked vias, metal islands referred to as landing pads are introduced for the purpose of contact-connection between the vias that are arranged one above the other. The metal islands project laterally beyond the vias to a significant extent on account of the line shortening effect. The vias arranged in layers lying one above the other are laterally offset with respect to one another. The landing pad of the invention is configured as an interconnect running between the vias. On account of the line shortening effect, which is less critical for longer tracks, contact areas provided at the ends of the interconnect do not have to be chosen to be as large as the square contact areas of conventional metal islands and can therefore be accommodated to save more space on a circuit layout to be miniaturized. The shrink factor of such a semiconductor structure is increased.
    Type: Application
    Filed: February 25, 2002
    Publication date: August 29, 2002
    Inventors: Lothar Bauch, Thomas Zell, Matthias Uwe Lehr, Albrecht Kieslich
  • Patent number: 5899706
    Abstract: In preparation for etch processing a semiconductor chip having areas of little or no pattern and areas that are heavily patterned, adding non-operative patterns to the areas having little or no pattern so that the overall pattern density is about the same across the chip.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: May 4, 1999
    Assignees: Siemens Aktiengesellschaft, International Business Machines Corporation
    Inventors: Andreas Kluwe, Lars Liebmann, Frank Prein, Thomas Zell
  • Patent number: 5130806
    Abstract: An electronic reprographic printing system that allows the sending of messages with a print job from remote user workstations to a central reprographic printing machine. The messages can be displayed on a User Interface, such as a video monitor, and additionally printed on a break page of the print job. Also disclosed is a system for sending messages that is capable of faulting a print job until the reprographic system operator acknowledges receipt of the message. The various messages can instruct the system operator to use a particular medium for the print job, for example, or instruct the system operator how to finish (bind, wrap, etc.) a print job.
    Type: Grant
    Filed: September 28, 1990
    Date of Patent: July 14, 1992
    Assignee: Xerox Corporation
    Inventors: Jeffrey G. Reed, Patricia Prokop, Nancy K. M. Rees, Ernie L. Legg, Thomas Zell, Paul Rulli, Elizabeth Bennett, Harriet Carter, Randy Hube, Paul J. Valliere