Abstract: A driving system (13) comprises a housing (10) having spherical hollow space (11), a rotatable main shaft (14), a driving means (16) and a piston construction (15). The piston construction (15) is rockable about a first rocking axis (15a) in a rectilinear motion backwards and forwards relative to a stationary wall portion (12). The driving means (16) is pivotally mounted in the main shaft (14) about a pivotable axis (16b) which forms an acute angle with the rotatable axis (14a) of the main shaft (14) and is rockably mounted in the piston construction (15) about a second rocking axis (16a), which extends at right angles to the first rocking axis (15a). The first and second rocking axis (15a, 16a) cross the rotational axis (14a) of the main shaft (14) at a common crossing point (11c) centrally in the spherical hollow space (11).

Abstract: A synchronizer and phase aligning method that provide signal smoothing and filtering functions as well as slip-cycle compensation, and allow for multichannel digital phase alignment, bus deskewing, integration of multiple transceivers within a single semiconductor chip, etc. A delay line produces a plurality of delayed input replicas of an input signal. A clock phase adjuster produces a sampling clock signal from a reference clock signal. The sampling clock signal may be phase adjusted to be offset from the input signal. After certain smoothing and filtering functions, selection logic detects a phase relationship between the sampling clock signal and the input replicas and identifies a closely synchronized signal for output. Using this identified replica signal, slip-cycle compensation and retiming logic outputs a compensated data output signal synchronized with the reference clock signal. Also, an integrated multiple transceiver produced using the phase alignment technique is presented.

Abstract: A synchronizer and phase aligning method that provide signal smoothing and filtering functions as well as slip-cycle compensation, and allow for multichannel digital phase alignment, bus deskewing, integration of multiple transceivers within a single semiconductor chip, etc. A delay line produces a plurality of delayed input replicas of an input signal. A clock phase adjuster produces a sampling clock signal from a reference clock signal. The sampling clock signal may be phase adjusted to be offset from the input signal. After certain smoothing and filtering functions, selection logic detects a phase relationship between the sampling clock signal and the input replicas and identifies a closely synchronized signal for output. Using this identified replica signal, slip-cycle compensation and retiming logic outputs a compensated data output signal synchronized with the reference clock signal. Also, an integrated multiple transceiver produced using the phase alignment technique is presented.

Abstract: A communication switch having heterogeneous ports. The heterogeneous ports are connected to nodes which may be operating at different frequencies and which may have different optical characteristics. In addition to the ports, the switch of the present invention includes a matrix controller and a matrix switch which is connected to the ports. When two ports want to communicate, the matrix controller commands the matrix switch to establish a physical connection between the ports. According to the present invention, data is transferred between the ports via the matrix switch in a serial and asynchronous manner. Because data is serially and asynchronously transmitted, high data rates through the matrix switch may be achieved.

Abstract: A partitioned switch having distributed clocks includes a global matrix switch and one or more self-contained mini-switches. The mini-switches each contain ports connected via a local matrix switch. Communication between ports located in the same mini-switch is performed synchronously and in parallel via the local matrix switch. Communication between ports located in different mini-switches is performed asynchronously and serially via the global matrix switch. The mini-switches control the global matrix switch by serially and asynchronously sending control information to the global matrix switch.

Abstract: The performance of some chips (e.g., VLSI processors) may be increased by running the internal circuits at higher clock rates, but use of a higher clock rate is limited by the heat-dissipation ability of the chip's package. Apparatus and a method is described for estimating the total heat accumulated for dissipation at any given time. For the periods that the chip is idle, the clock rate is decreased to reduce heat generation. The heat saved while the chip is idling is available for use later to increase the clock rate above normal, provided that the total heat generated does not exceed the heat-dissipation capacity of the package.

Abstract: The power conversion machine includes a housing which defines a spherical cavity as well as a stator which is secured within the housing on a first axis. The stator is provided with an annular groove which is disposed on an angle to the axis of the stator while an annular guide member is slidably mounted in the groove for rotation about the stator axis. A first rotor part is secured to a shaft which is rotatably mounted on the stator and carries a pair of pistons which define ball shaped segments within the cavity of the housing. A second rotor part having a second pair of pistons defining a pair of ball shaped segments within the cavity is disposed on a second axis perpendicular to the axis of rotation. Pins are used to secure the second rotor part to the annular guide member for rocking of the second rotor part about the second axis during rotation of the two rotor parts about the axis of rotation.

Abstract: A power conversion machine which is provided with a spherical housing (10) with piston construction (36,37) having two-double-acting pistons (36) turnable about a first axis (x--x) cooperating with a partition plate (40) tiltable about a second axis (z--z) for defining four work chambers with piston surfaces (36a, 36b) going forwards and backwards. The partition plate is connected forcibly to the piston construction so that the partition plate is subjected to a tilting movement while the piston construction is subjected to turning, without thereby turning the partition plate. Inlet openings and outlet openings which are placed one after the other in communication with the four work chambers, are opened and closed by a control effected by joint movement of the pistons and the partition plate.

Abstract: An electro-optical transducer assembly for translating between an optical high speed serial data transmission path and parallel electrical data transmission paths is provided by a light emitting or light detecting device with serial terminals, a logic chip with timing, amplifying, serializing or de-serializing circuitry, and a multi-layer coupling chip with parallel input or output contacts mounted between the device and the logic chip for coupling the serial terminals of the device to the serial terminals on the logic chip and coupling the logic chip parallel terminals to the parallel input or output contacts.

Abstract: A high content LCD includes, a glass plate; a polysilicon deposited substrate supporting a matrix of electrodes; each of the electrodes defining a picture element (pel) in the LCD; a liquid crystal material interposed between the glass plate and the substrate; a plurality of FET devices, there being one or more FET device associated with each of the electrodes; and means for selectively actuating the FET devices to display an image on the LCD.

Abstract: An electrochromic matrix display of the kind in which the display electrodes are supported on a substrate above a corresponding matrix of transistor switches employs constant current writing and potentiostatic erasure. The transistors are switchable by signals applied on respective gate lines to pass electric current on the respective drive lines to their display electrodes. Gate and drive selection means define the active gate and drive lines During erasure, the potentiostatic erase voltage is applied to both ends of the selected drive lines simultaneously to speed up the current limited asynchronous erase operation. Optionally, the display may be driven alternately from opposite ends of the drive lines during a line-by-line writing operation.

Abstract: The power conversion machine has a piston which is adapted to effect a combined turning and rocking movement internally in a double-curved space. The piston is in drive connection with a rotary shaft via an eccentric disc which is obliquely disposed on the center axis of the rotary shaft. The center axis of the rotary shaft and the center axis of the eccentric disc cross each other in the center of the double-curved space. The double-curved space in defined within a ball shell and is divided into two opposing substantially ball-shaped spaces by means of a stationarily secured circular partition plate. The piston operates simultaneously in the two semi-spherical spaces, the piston passing through the partition plate via a diametrically extending slot. The piston comprises a disc-shaped main portion, and two oppositely directed roller portions which are received in respective semi-spherical spaces.