Patents by Inventor Thorbjörn Ebefors
Thorbjörn Ebefors has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210162457Abstract: There is provided systems, devices and methods for system (100) for generating an acoustic-potential field of ultrasonic waves, using an array of acoustic micromachined ultrasonic transducer, MUT, elements, the array of acoustic MUT elements being comprised in one or more micromachined ultrasonic transducer, MUT; and having a controller being communicably connected to two or more of said acoustic MUT elements in said array, and being configured to control each of the two or more acoustic MUT elements to emit a modulated ultrasonic signal comprising a plurality of ultrasound waves towards one or more common focal points according to a respective phase shift of each of the two or more acoustic MUT elements, configured to cause the ultrasound waves of the modulated ultrasonic signals to be constructively combined at the common focal point(s), so as to generate an acoustic-potential field of ultrasonic waves.Type: ApplicationFiled: April 26, 2019Publication date: June 3, 2021Inventor: Thorbjörn EBEFORS
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Patent number: 9484293Abstract: The invention relates to a semiconductor structure, comprising a substrate of a semiconductor material having a first side (FS) and an opposite second side (BS). There is at least one conductive wafer-through via (V) comprising metal, and at least one recess (RDL) provided in the first side of the substrate and in the semiconductor material of the substrate. The recess is filled with metal and seamlessly connected with the wafer-through via. The exposed surfaces of the metal filled via and the metal filled recess are essentially flush with the substrate surface on the first side of the substrate. There is also provide an interposer comprising the above structure, further comprising contacts for attaching circuit boards and integrated circuits on opposite sides of the interposer. A method of making the structure is also provided.Type: GrantFiled: October 13, 2015Date of Patent: November 1, 2016Assignee: SILEX MICROSYSTEMS ABInventors: Thorbjörn Ebefors, Daniel Perttu
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Patent number: 9362139Abstract: A wafer level method of making a micro-electronic and/or micro-mechanic device, having a capping with electrical wafer through connections (vias), comprising the steps of providing a first wafer of a semiconductor material having a first and a second side and a plurality of holes and/or recesses in the first side, and a barrier structure extending over the wafer on the second side, said barrier comprising an inner layer an insulating material, such as oxide, and an outer layer of another material. Then, metal is applied in said holes so as to cover the walls in the holes and the bottom of the holes. The barrier structure is removed and contacts are provided to the wafer through connections on the back-side of the wafer. Bonding structures are provided on either of said first side or the second side of the wafer. The wafer is bonded to another wafer carrying electronic and micro-electronic/mechanic components, such that the first wafer forms a capping structure covering the second wafer.Type: GrantFiled: November 19, 2009Date of Patent: June 7, 2016Assignee: Silex Microsystems ABInventors: Thorbjörn Ebefors, Edvard Kälvesten, Tomas Bauer
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Patent number: 9312217Abstract: The invention relates to a method of making a starting substrate wafer for semiconductor engineering having electrical wafer through connections (140; 192). It comprises providing a wafer (110; 150) having a front side and a back side and having a base of low resistivity silicon and a layer of high resistivity material on the front side. On the wafer there are islands of low resistivity material in the layer of high resistivity material. The islands are in contact with the silicon base material. Trenches are etched from the back side of the wafer but not all the way through the wafer to provide insulating enclosures defining the wafer through connections (140; 192). The trenches are filled with insulating material. Then the front side of the wafer is grinded to expose the insulating material to create the wafer through connections.Type: GrantFiled: January 31, 2007Date of Patent: April 12, 2016Assignee: Silex Microsystems ABInventors: Edvard Kälvesten, Tomas Bauer, Thorbjörn Ebefors
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Publication number: 20160035662Abstract: The invention relates to a semiconductor structure, comprising a substrate of a semiconductor material having a first side (FS) and an opposite second side (BS). There is at least one conductive wafer-through via (V) comprising metal, and at least one recess (RDL) provided in the first side of the substrate and in the semiconductor material of the substrate. The recess is filled with metal and seamlessly connected with the wafer-through via. The exposed surfaces of the metal filled via and the metal filled recess are essentially flush with the substrate surface on the first side of the substrate. There is also provide an interposer comprising the above structure, further comprising contacts for attaching circuit boards and integrated circuits on opposite sides of the interposer. A method of making the structure is also provided.Type: ApplicationFiled: October 13, 2015Publication date: February 4, 2016Inventors: Thorbjörn EBEFORS, Daniel PERTTU
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Patent number: 9240373Abstract: The invention relates to a semiconductor structure, comprising a substrate of a semiconductor material having a first side (FS) and an opposite second side (BS). There is at least one conductive wafer-through via (V) comprising metal, and at least one recess (RDL) provided in the first side of the substrate and in the semiconductor material of the substrate. The recess is filled with metal and seamlessly connected with the wafer-through via. The exposed surfaces of the metal filled via and the metal filled recess are essentially flush with the substrate surface on the first side of the substrate. There is also provide an interposer comprising the above structure, further comprising contacts for attaching circuit boards and integrated circuits on opposite sides of the interposer. A method of making the structure is also provided.Type: GrantFiled: March 12, 2013Date of Patent: January 19, 2016Assignee: SILEX MICROSYSTEMS ABInventors: Thorbjörn Ebefors, Daniel Perttu
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Patent number: 9190356Abstract: The invention relates to a semiconductor structure, comprising a substrate of a semiconductor material having a first side (FS) and an opposite second side (BS). There is at least one conductive wafer-through via (V) comprising metal, and at least one recess (RDL) provided in the first side of the substrate and in the semiconductor material of the substrate. The recess is filled with metal and seamlessly connected with the wafer-through via. The exposed surfaces of the metal filled via and the metal filled recess are essentially flush with the substrate surface on the first side of the substrate. There is also provide an interposer comprising the above structure, further comprising contacts for attaching circuit boards and integrated circuits on opposite sides of the interposer. A method of making the structure is also provided.Type: GrantFiled: March 12, 2013Date of Patent: November 17, 2015Assignee: SILEX MICROSYSTEMS ABInventors: Thorbjörn Ebefors, Daniel Perttu
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Publication number: 20150028479Abstract: The invention relates to a semiconductor structure, comprising a substrate of a semiconductor material having a first side (FS) and an opposite second side (BS). There is at least one conductive wafer-through via (V) comprising metal, and at least one recess (RDL) provided in the first side of the substrate and in the semiconductor material of the substrate. The recess is filled with metal and seamlessly connected with the wafer-through via. The exposed surfaces of the metal filled via and the metal filled recess are essentially flush with the substrate surface on the first side of the substrate. There is also provide an interposer comprising the above structure, further comprising contacts for attaching circuit boards and integrated circuits on opposite sides of the interposer. A method of making the structure is also provided.Type: ApplicationFiled: March 12, 2013Publication date: January 29, 2015Inventors: Thorbjörn Ebefors, Daniel Perttu
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Patent number: 8729685Abstract: A sealing and bonding material structure for joining semiconductor wafers having monolithically integrated components. The sealing and bonding material are provided in strips forming closed loops. There are provided at least two concentric sealing strips on one wafer. The strips are laid out so as to surround the component(s) on the wafers to be sealed off when wafers are bonded together. The material in the strips is a material bonding the semiconductor wafers together and sealing off the monolithically integrated components when subjected to force and optionally heating. A monolithically integrated electrical and/or mechanical and/or fluidic and/or optical device including a first substrate and a second substrate, bonded together with the sealing and bonding structure, and a method of providing a sealing and bonding material structure on at least one of two wafers and applying a force and optionally heat to the wafers to join them are described.Type: GrantFiled: April 30, 2010Date of Patent: May 20, 2014Assignee: Silex Microsystems ABInventors: Thorbjörn Ebefors, Edward Kälvesten, Niklas Svedin, Anders Eriksson
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Patent number: 8729713Abstract: A vent hole precursor structure (26) in an intermediate product for a semi-conductor device has delicate structures (27, 28), and said intermediate product has a cavity (21) with a pressure therein differing from the pressure of the surroundings. The intermediate product comprises a first wafer (20) in which there is formed a depression (21). The first wafer is bonded to a second wafer (22) comprising a device layer (23) from which the structures (27, 28) are to be made by etching. A hole or groove (26) having a predefined depth extends downwards into the device layer, such that the cavity (21) during etching is opened up before the etching procedure breaks through the device layer (23) to form the structures (27, 28).Type: GrantFiled: July 28, 2011Date of Patent: May 20, 2014Assignee: Silex Microsystems ABInventors: Thorbjörn Ebefors, Edvard Kälvesten, Peter Agren, Niklas Svedin
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Patent number: 8637351Abstract: The invention relates in a general aspect to a method of making vertically protruding elements on a substrate, said elements having a tip comprising at least one inclined surface and an elongated body portion extending between said substrate and said tip. The method comprises an anisotropic, crystal plane dependent etch forming said inclined surface(s); and an anisotropic, non crystal plane dependent etch forming said elongated body portion; combined with suitable patterning processes defining said protruding elements to have a predetermined base geometry.Type: GrantFiled: October 21, 2011Date of Patent: January 28, 2014Assignee: Silex Microsystem ABInventors: Edvard Kälvesten, Thorbjörn Ebefors, Thierry Corman
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Patent number: 8630033Abstract: A layered micro-electronic and/or micro-mechanic structure comprises at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.Type: GrantFiled: June 22, 2011Date of Patent: January 14, 2014Assignee: Silex Microsystems ABInventors: Thorbjörn Ebefors, Edvard Kälvesten, Peter Agren, Niklas Svedin, Thomas Ericson
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Patent number: 8598676Abstract: A starting substrate in the form of a semiconductor wafer (1) has a first side and a second side, the sides being plane-parallel with respect to each other, and has a thickness rendering it suitable for processing without significant risk of being damaged, for the fabrication of combined analogue and digital designs, the wafer including at least two partitions (A1, A2; DIGITAL, ANALOGUE) electrically insulated from each other by insulating material (2; 38; 81; L) extending entirely through the wafer. A method for making such substrates including etching trenches in a wafer, and filling trenches with insulating material is also described.Type: GrantFiled: August 3, 2012Date of Patent: December 3, 2013Assignee: Silex Microsystems ABInventors: Thorbjörn Ebefors, Tomas Bauer
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Patent number: 8592981Abstract: The invention relates to a layered micro-electronic and/or micro-mechanic structure, comprising at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.Type: GrantFiled: December 23, 2009Date of Patent: November 26, 2013Assignee: Silex Microsystems ABInventors: Thorbjörn Ebefors, Edvard Kälvesten, Peter Ågren, Niklas Svedin
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Publication number: 20120292736Abstract: A starting substrate in the form of a semiconductor wafer (1) has a first side and a second side, the sides being plane-parallel with respect to each other, and has a thickness rendering it suitable for processing without significant risk of being damaged, for the fabrication of combined analogue and digital designs, the wafer including at least two partitions (A1, A2; DIGITAL, ANALOGUE) electrically insulated from each other by insulating material (2; 38; 81; L) extending entirely through the wafer. A method for making such substrates including etching trenches in a wafer, and filling trenches with insulating material is also described.Type: ApplicationFiled: August 3, 2012Publication date: November 22, 2012Applicant: SILEX MICROSYSTEMS ABInventors: Thorbjörn Ebefors, Tomas Bauer
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Patent number: 8308960Abstract: The invention relates in a general aspect to a method of making vertically protruding elements on a substrate, said elements having a tip comprising at least one inclined surface and an elongated body portion extending between said substrate and said tip. The method comprises an anisotropic, crystal plane dependent etch forming said inclined surface(s); and an anisotropic, non crystal plane dependent etch forming said elongated body portion; combined with suitable patterning processes defining said protruding elements to have a predetermined base geometry.Type: GrantFiled: December 14, 2006Date of Patent: November 13, 2012Assignee: Silex Microsystems ABInventors: Edvard Kälvesten, Thorbjörn Ebefors, Thierry Corman
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Publication number: 20120267773Abstract: A wafer level method of making a micro-electronic and/or micro-mechanic device, having a capping with electrical wafer through connections (vias), comprising the steps of providing a first wafer of a semiconductor material having a first and a second side and a plurality of holes and/or recesses in the first side, and a barrier structure extending over the wafer on the second side, said barrier comprising an inner layer an insulating material, such as oxide, and an outer layer of another material. Then, metal is applied in said holes so as to cover the walls in the holes and the bottom of the holes. The barrier structure is removed and contacts are provided to the wafer through connections on the back-side of the wafer. Bonding structures are provided on either of said first side or the second side of the wafer. The wafer is bonded to another wafer carrying electronic and micro-electronic/mechanic components, such that the first wafer forms a capping structure covering the second wafer.Type: ApplicationFiled: November 19, 2009Publication date: October 25, 2012Applicant: SILEX Microsystems ABInventors: Thorbjörn Ebefors, Edvard Kälvesten, Tomas Bauer
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Publication number: 20120126392Abstract: The invention relates in a general aspect to a method of making vertically protruding elements on a substrate, said elements having a tip comprising at least one inclined surface and an elongated body portion extending between said substrate and said tip. The method comprises an anisotropic, crystal plane dependent etch forming said inclined surface(s); and an anisotropic, non crystal plane dependent etch forming said elongated body portion; combined with suitable patterning processes defining said protruding elements to have a predetermined base geometry.Type: ApplicationFiled: October 21, 2011Publication date: May 24, 2012Applicant: SILEX MICROSYSTEMS ABInventors: Edvard Kälvesten, Thorbjörn Ebefors, Thierry Corman
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Publication number: 20120112335Abstract: A sealing and bonding material structure for joining semiconductor wafers having monolithically integrated components. The sealing and bonding material are provided in strips forming closed loops. There are provided at least two concentric sealing strips on one wafer. The strips are laid out so as to surround the component(s) on the wafers to be sealed off when wafers are bonded together. The material in the strips is a material bonding the semiconductor wafers together and sealing off the monolithically integrated components when subjected to force and optionally heating. A monolithically integrated electrical and/or mechanical and/or fluidic and/or optical device including a first substrate and a second substrate, bonded together with the sealing and bonding structure, and a method of providing a sealing and bonding material structure on at least one of two wafers and applying a force and optionally heat to the wafers to join them are described.Type: ApplicationFiled: January 5, 2012Publication date: May 10, 2012Applicant: SILEX MICROSYSTEMS ABInventors: Thorbjörn EBEFORS, Edward KÄLVESTEN, Niklas SVEDIN, Anders ERIKSSON
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Publication number: 20120097733Abstract: A sealing and bonding material structure for joining semiconductor wafers having monolithically integrated components. The sealing and bonding material are provided in strips forming closed loops. There are provided at least two concentric sealing strips on one wafer. The strips are laid out so as to surround the component(s) on the wafers to be sealed off when wafers are bonded together. The material in the strips is a material bonding the semiconductor wafers together and sealing off the monolithically integrated components when subjected to force and optionally heating. A monolithically integrated electrical and/or mechanical and/or fluidic and/or optical device including a first substrate and a second substrate, bonded together with the sealing and bonding structure, and a method of providing a sealing and bonding material structure on at least one of two wafers and applying a force and optionally heat to the wafers to join them are described.Type: ApplicationFiled: January 5, 2012Publication date: April 26, 2012Applicant: SILEX MICROSYSTEMS ABInventors: Thorbjörn EBEFORS, Edvard KÄLVESTEN, Niklas SVEDIN, Anders ERIKSSON