Patents by Inventor Thorbjörn Ebefors

Thorbjörn Ebefors has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210162457
    Abstract: There is provided systems, devices and methods for system (100) for generating an acoustic-potential field of ultrasonic waves, using an array of acoustic micromachined ultrasonic transducer, MUT, elements, the array of acoustic MUT elements being comprised in one or more micromachined ultrasonic transducer, MUT; and having a controller being communicably connected to two or more of said acoustic MUT elements in said array, and being configured to control each of the two or more acoustic MUT elements to emit a modulated ultrasonic signal comprising a plurality of ultrasound waves towards one or more common focal points according to a respective phase shift of each of the two or more acoustic MUT elements, configured to cause the ultrasound waves of the modulated ultrasonic signals to be constructively combined at the common focal point(s), so as to generate an acoustic-potential field of ultrasonic waves.
    Type: Application
    Filed: April 26, 2019
    Publication date: June 3, 2021
    Inventor: Thorbjörn EBEFORS
  • Patent number: 9484293
    Abstract: The invention relates to a semiconductor structure, comprising a substrate of a semiconductor material having a first side (FS) and an opposite second side (BS). There is at least one conductive wafer-through via (V) comprising metal, and at least one recess (RDL) provided in the first side of the substrate and in the semiconductor material of the substrate. The recess is filled with metal and seamlessly connected with the wafer-through via. The exposed surfaces of the metal filled via and the metal filled recess are essentially flush with the substrate surface on the first side of the substrate. There is also provide an interposer comprising the above structure, further comprising contacts for attaching circuit boards and integrated circuits on opposite sides of the interposer. A method of making the structure is also provided.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: November 1, 2016
    Assignee: SILEX MICROSYSTEMS AB
    Inventors: Thorbjörn Ebefors, Daniel Perttu
  • Patent number: 9362139
    Abstract: A wafer level method of making a micro-electronic and/or micro-mechanic device, having a capping with electrical wafer through connections (vias), comprising the steps of providing a first wafer of a semiconductor material having a first and a second side and a plurality of holes and/or recesses in the first side, and a barrier structure extending over the wafer on the second side, said barrier comprising an inner layer an insulating material, such as oxide, and an outer layer of another material. Then, metal is applied in said holes so as to cover the walls in the holes and the bottom of the holes. The barrier structure is removed and contacts are provided to the wafer through connections on the back-side of the wafer. Bonding structures are provided on either of said first side or the second side of the wafer. The wafer is bonded to another wafer carrying electronic and micro-electronic/mechanic components, such that the first wafer forms a capping structure covering the second wafer.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: June 7, 2016
    Assignee: Silex Microsystems AB
    Inventors: Thorbjörn Ebefors, Edvard Kälvesten, Tomas Bauer
  • Patent number: 9312217
    Abstract: The invention relates to a method of making a starting substrate wafer for semiconductor engineering having electrical wafer through connections (140; 192). It comprises providing a wafer (110; 150) having a front side and a back side and having a base of low resistivity silicon and a layer of high resistivity material on the front side. On the wafer there are islands of low resistivity material in the layer of high resistivity material. The islands are in contact with the silicon base material. Trenches are etched from the back side of the wafer but not all the way through the wafer to provide insulating enclosures defining the wafer through connections (140; 192). The trenches are filled with insulating material. Then the front side of the wafer is grinded to expose the insulating material to create the wafer through connections.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: April 12, 2016
    Assignee: Silex Microsystems AB
    Inventors: Edvard Kälvesten, Tomas Bauer, Thorbjörn Ebefors
  • Publication number: 20160035662
    Abstract: The invention relates to a semiconductor structure, comprising a substrate of a semiconductor material having a first side (FS) and an opposite second side (BS). There is at least one conductive wafer-through via (V) comprising metal, and at least one recess (RDL) provided in the first side of the substrate and in the semiconductor material of the substrate. The recess is filled with metal and seamlessly connected with the wafer-through via. The exposed surfaces of the metal filled via and the metal filled recess are essentially flush with the substrate surface on the first side of the substrate. There is also provide an interposer comprising the above structure, further comprising contacts for attaching circuit boards and integrated circuits on opposite sides of the interposer. A method of making the structure is also provided.
    Type: Application
    Filed: October 13, 2015
    Publication date: February 4, 2016
    Inventors: Thorbjörn EBEFORS, Daniel PERTTU
  • Patent number: 9240373
    Abstract: The invention relates to a semiconductor structure, comprising a substrate of a semiconductor material having a first side (FS) and an opposite second side (BS). There is at least one conductive wafer-through via (V) comprising metal, and at least one recess (RDL) provided in the first side of the substrate and in the semiconductor material of the substrate. The recess is filled with metal and seamlessly connected with the wafer-through via. The exposed surfaces of the metal filled via and the metal filled recess are essentially flush with the substrate surface on the first side of the substrate. There is also provide an interposer comprising the above structure, further comprising contacts for attaching circuit boards and integrated circuits on opposite sides of the interposer. A method of making the structure is also provided.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: January 19, 2016
    Assignee: SILEX MICROSYSTEMS AB
    Inventors: Thorbjörn Ebefors, Daniel Perttu
  • Patent number: 9190356
    Abstract: The invention relates to a semiconductor structure, comprising a substrate of a semiconductor material having a first side (FS) and an opposite second side (BS). There is at least one conductive wafer-through via (V) comprising metal, and at least one recess (RDL) provided in the first side of the substrate and in the semiconductor material of the substrate. The recess is filled with metal and seamlessly connected with the wafer-through via. The exposed surfaces of the metal filled via and the metal filled recess are essentially flush with the substrate surface on the first side of the substrate. There is also provide an interposer comprising the above structure, further comprising contacts for attaching circuit boards and integrated circuits on opposite sides of the interposer. A method of making the structure is also provided.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: November 17, 2015
    Assignee: SILEX MICROSYSTEMS AB
    Inventors: Thorbjörn Ebefors, Daniel Perttu
  • Publication number: 20150028479
    Abstract: The invention relates to a semiconductor structure, comprising a substrate of a semiconductor material having a first side (FS) and an opposite second side (BS). There is at least one conductive wafer-through via (V) comprising metal, and at least one recess (RDL) provided in the first side of the substrate and in the semiconductor material of the substrate. The recess is filled with metal and seamlessly connected with the wafer-through via. The exposed surfaces of the metal filled via and the metal filled recess are essentially flush with the substrate surface on the first side of the substrate. There is also provide an interposer comprising the above structure, further comprising contacts for attaching circuit boards and integrated circuits on opposite sides of the interposer. A method of making the structure is also provided.
    Type: Application
    Filed: March 12, 2013
    Publication date: January 29, 2015
    Inventors: Thorbjörn Ebefors, Daniel Perttu
  • Patent number: 8729713
    Abstract: A vent hole precursor structure (26) in an intermediate product for a semi-conductor device has delicate structures (27, 28), and said intermediate product has a cavity (21) with a pressure therein differing from the pressure of the surroundings. The intermediate product comprises a first wafer (20) in which there is formed a depression (21). The first wafer is bonded to a second wafer (22) comprising a device layer (23) from which the structures (27, 28) are to be made by etching. A hole or groove (26) having a predefined depth extends downwards into the device layer, such that the cavity (21) during etching is opened up before the etching procedure breaks through the device layer (23) to form the structures (27, 28).
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: May 20, 2014
    Assignee: Silex Microsystems AB
    Inventors: Thorbjörn Ebefors, Edvard Kälvesten, Peter Agren, Niklas Svedin
  • Patent number: 8729685
    Abstract: A sealing and bonding material structure for joining semiconductor wafers having monolithically integrated components. The sealing and bonding material are provided in strips forming closed loops. There are provided at least two concentric sealing strips on one wafer. The strips are laid out so as to surround the component(s) on the wafers to be sealed off when wafers are bonded together. The material in the strips is a material bonding the semiconductor wafers together and sealing off the monolithically integrated components when subjected to force and optionally heating. A monolithically integrated electrical and/or mechanical and/or fluidic and/or optical device including a first substrate and a second substrate, bonded together with the sealing and bonding structure, and a method of providing a sealing and bonding material structure on at least one of two wafers and applying a force and optionally heat to the wafers to join them are described.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: May 20, 2014
    Assignee: Silex Microsystems AB
    Inventors: Thorbjörn Ebefors, Edward Kälvesten, Niklas Svedin, Anders Eriksson
  • Patent number: 8637351
    Abstract: The invention relates in a general aspect to a method of making vertically protruding elements on a substrate, said elements having a tip comprising at least one inclined surface and an elongated body portion extending between said substrate and said tip. The method comprises an anisotropic, crystal plane dependent etch forming said inclined surface(s); and an anisotropic, non crystal plane dependent etch forming said elongated body portion; combined with suitable patterning processes defining said protruding elements to have a predetermined base geometry.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: January 28, 2014
    Assignee: Silex Microsystem AB
    Inventors: Edvard Kälvesten, Thorbjörn Ebefors, Thierry Corman
  • Patent number: 8630033
    Abstract: A layered micro-electronic and/or micro-mechanic structure comprises at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.
    Type: Grant
    Filed: June 22, 2011
    Date of Patent: January 14, 2014
    Assignee: Silex Microsystems AB
    Inventors: Thorbjörn Ebefors, Edvard Kälvesten, Peter Agren, Niklas Svedin, Thomas Ericson
  • Patent number: 8598676
    Abstract: A starting substrate in the form of a semiconductor wafer (1) has a first side and a second side, the sides being plane-parallel with respect to each other, and has a thickness rendering it suitable for processing without significant risk of being damaged, for the fabrication of combined analogue and digital designs, the wafer including at least two partitions (A1, A2; DIGITAL, ANALOGUE) electrically insulated from each other by insulating material (2; 38; 81; L) extending entirely through the wafer. A method for making such substrates including etching trenches in a wafer, and filling trenches with insulating material is also described.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: December 3, 2013
    Assignee: Silex Microsystems AB
    Inventors: Thorbjörn Ebefors, Tomas Bauer
  • Patent number: 8592981
    Abstract: The invention relates to a layered micro-electronic and/or micro-mechanic structure, comprising at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: November 26, 2013
    Assignee: Silex Microsystems AB
    Inventors: Thorbjörn Ebefors, Edvard Kälvesten, Peter Ågren, Niklas Svedin
  • Publication number: 20120292736
    Abstract: A starting substrate in the form of a semiconductor wafer (1) has a first side and a second side, the sides being plane-parallel with respect to each other, and has a thickness rendering it suitable for processing without significant risk of being damaged, for the fabrication of combined analogue and digital designs, the wafer including at least two partitions (A1, A2; DIGITAL, ANALOGUE) electrically insulated from each other by insulating material (2; 38; 81; L) extending entirely through the wafer. A method for making such substrates including etching trenches in a wafer, and filling trenches with insulating material is also described.
    Type: Application
    Filed: August 3, 2012
    Publication date: November 22, 2012
    Applicant: SILEX MICROSYSTEMS AB
    Inventors: Thorbjörn Ebefors, Tomas Bauer
  • Patent number: 8308960
    Abstract: The invention relates in a general aspect to a method of making vertically protruding elements on a substrate, said elements having a tip comprising at least one inclined surface and an elongated body portion extending between said substrate and said tip. The method comprises an anisotropic, crystal plane dependent etch forming said inclined surface(s); and an anisotropic, non crystal plane dependent etch forming said elongated body portion; combined with suitable patterning processes defining said protruding elements to have a predetermined base geometry.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: November 13, 2012
    Assignee: Silex Microsystems AB
    Inventors: Edvard Kälvesten, Thorbjörn Ebefors, Thierry Corman
  • Publication number: 20120267773
    Abstract: A wafer level method of making a micro-electronic and/or micro-mechanic device, having a capping with electrical wafer through connections (vias), comprising the steps of providing a first wafer of a semiconductor material having a first and a second side and a plurality of holes and/or recesses in the first side, and a barrier structure extending over the wafer on the second side, said barrier comprising an inner layer an insulating material, such as oxide, and an outer layer of another material. Then, metal is applied in said holes so as to cover the walls in the holes and the bottom of the holes. The barrier structure is removed and contacts are provided to the wafer through connections on the back-side of the wafer. Bonding structures are provided on either of said first side or the second side of the wafer. The wafer is bonded to another wafer carrying electronic and micro-electronic/mechanic components, such that the first wafer forms a capping structure covering the second wafer.
    Type: Application
    Filed: November 19, 2009
    Publication date: October 25, 2012
    Applicant: SILEX Microsystems AB
    Inventors: Thorbjörn Ebefors, Edvard Kälvesten, Tomas Bauer
  • Publication number: 20120126392
    Abstract: The invention relates in a general aspect to a method of making vertically protruding elements on a substrate, said elements having a tip comprising at least one inclined surface and an elongated body portion extending between said substrate and said tip. The method comprises an anisotropic, crystal plane dependent etch forming said inclined surface(s); and an anisotropic, non crystal plane dependent etch forming said elongated body portion; combined with suitable patterning processes defining said protruding elements to have a predetermined base geometry.
    Type: Application
    Filed: October 21, 2011
    Publication date: May 24, 2012
    Applicant: SILEX MICROSYSTEMS AB
    Inventors: Edvard Kälvesten, Thorbjörn Ebefors, Thierry Corman
  • Publication number: 20120112335
    Abstract: A sealing and bonding material structure for joining semiconductor wafers having monolithically integrated components. The sealing and bonding material are provided in strips forming closed loops. There are provided at least two concentric sealing strips on one wafer. The strips are laid out so as to surround the component(s) on the wafers to be sealed off when wafers are bonded together. The material in the strips is a material bonding the semiconductor wafers together and sealing off the monolithically integrated components when subjected to force and optionally heating. A monolithically integrated electrical and/or mechanical and/or fluidic and/or optical device including a first substrate and a second substrate, bonded together with the sealing and bonding structure, and a method of providing a sealing and bonding material structure on at least one of two wafers and applying a force and optionally heat to the wafers to join them are described.
    Type: Application
    Filed: January 5, 2012
    Publication date: May 10, 2012
    Applicant: SILEX MICROSYSTEMS AB
    Inventors: Thorbjörn EBEFORS, Edward KÄLVESTEN, Niklas SVEDIN, Anders ERIKSSON
  • Publication number: 20120097733
    Abstract: A sealing and bonding material structure for joining semiconductor wafers having monolithically integrated components. The sealing and bonding material are provided in strips forming closed loops. There are provided at least two concentric sealing strips on one wafer. The strips are laid out so as to surround the component(s) on the wafers to be sealed off when wafers are bonded together. The material in the strips is a material bonding the semiconductor wafers together and sealing off the monolithically integrated components when subjected to force and optionally heating. A monolithically integrated electrical and/or mechanical and/or fluidic and/or optical device including a first substrate and a second substrate, bonded together with the sealing and bonding structure, and a method of providing a sealing and bonding material structure on at least one of two wafers and applying a force and optionally heat to the wafers to join them are described.
    Type: Application
    Filed: January 5, 2012
    Publication date: April 26, 2012
    Applicant: SILEX MICROSYSTEMS AB
    Inventors: Thorbjörn EBEFORS, Edvard KÄLVESTEN, Niklas SVEDIN, Anders ERIKSSON