Abstract: The invention relates to a method for controlling a wind turbine system, more particular for a controlled sliding strategy to lower loads on the yaw system by controlling mechanical brakes and motor brakes in the yaw drive actuators. When the yaw system being in the non-yawing operational state, and the mechanical brake(s) being in an engaged state, and the yaw controller determines or receives a signal indicative of a yaw moment, and if the signal indicative of a yaw moment is above a signal threshold, then the yaw controller sends a braking signal to the yaw drive actuators to enter the motors into the brake state to apply a braking torque.

Abstract: A digital baseband processor is provided for concurrent operation with different wireless systems. The digital baseband processor includes a digital signal processor for executing digital signal processor instructions, a microcontroller for executing microcontroller instructions, and a timing and event processor controlled by the digital signal processor and the microcontroller for executing timing-sensitive instructions. The timing and event processor includes a plurality of instruction sequencers for executing timing-sensitive instruction threads and a time base generator for generating timing signals for initiating execution of the instruction threads on each of the plurality of instruction sequencers.

Abstract: A digital baseband processor is provided for concurrent operation with different wireless systems. The digital baseband processor includes a digital signal processor for executing digital signal processor instructions, a microcontroller for executing microcontroller instructions, and a timing and event processor controlled by the digital signal processor and the microcontroller for executing timing-sensitive instructions. The timing and event processor includes a plurality of instruction sequencers for executing timing-sensitive instruction threads and a time base generator for generating timing signals for initiating execution of the instruction threads on each of the plurality of instruction sequencers.