Patents by Inventor Thorsten BREHM

Thorsten BREHM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230333892
    Abstract: A method for documenting computing steps of a real time system executed on a computer core of a processor, wherein tasks are executed on the computer core, which include one or more subtasks, and wherein during a computing step in each case a subtask of a task is executed. A first processor time is recorded at the beginning and a second processor time is recorded at the end of a computing step and time information dependent on the first and second processor times is stored in memory. The time information is stored in memory in such a way that it can be assigned to the subtask and the task that was executed during the computing step.
    Type: Application
    Filed: April 13, 2023
    Publication date: October 19, 2023
    Applicant: dSPACE GmbH
    Inventors: Heiko KALTE, Thorsten BREHM, Dominik LUBELEY
  • Patent number: 10621312
    Abstract: In a method for operating a process computer that is at least intermittently connected to a user computer that executes a configuration program that can transmit executable binary code to the process computer, there is provision for a license check. The binary code has associated license information that indicates required licenses, and the configuration program is set up to receive an explicit identification of the process computer. The configuration program supplies an authorization program with the identification and with the license information. The authorization program establishes a permissibility by checking whether the available licenses associated with the explicit identification cover the licenses required according to license information, and the configuration program transmits the executable binary code to the process computer only if the authorization program has established the permissibility. The disclosure further relates to a user computer and a computer program product.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: April 14, 2020
    Assignee: DSPACE DIGITAL SIGNAL PROCESSING AND CONTROL ENGINEERING GMBH
    Inventors: Elmar Schmitz, Albert Schwarte, Guido Schäfergockel, Thorsten Brehm
  • Publication number: 20190165996
    Abstract: A method for operating a real-time-capable simulation network having multiple network nodes for computing a simulation model. The network nodes are connected to one another via a serial data bus, and the network nodes exchange data via data bus messages. At least one event-driven task of the simulation model is implemented on a first network node, and a nondeterministic triggering event is detected by a second network node. The second network node communicates the detected triggering event to the first network node and the first network node computes the event-driven task. A fast response time is achieved by the means that a detection signal is sent from the second network node in the form of a multicast data bus message or a broadcast data bus message to multiple network nodes of the simulation network or to all network nodes of the simulation network over the serial data bus.
    Type: Application
    Filed: November 27, 2017
    Publication date: May 30, 2019
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Matthias KLEMM, Heiko KALTE, Robert POLNAU, Thorsten BREHM, Jochen SAUER, Hans-Juergen MIKS, Robert LEINFELLNER, Ruediger KRAFT, Magnus ASPLUND, Matthias SCHMITZ
  • Patent number: 10180917
    Abstract: An interface unit for data exchange between a first processor of a computer system and a peripheral environment. The interface unit has a number of input data channels for receiving input data from the peripheral environment and a first access management unit. The access management unit is configured to receive a request for providing the input data, stored in the number of input data channels, from a first interface processor stored in the interface unit and from a second interface processor stored in the interface unit and to provide or not to provide the input data, stored in the number of input data channels, to the first interface processor and the second interface processor. A first priority and a second priority can be stored in the first access management unit.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: January 15, 2019
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Jochen Sauer, Robert Leinfellner, Matthias Klemm, Thorsten Brehm, Robert Polnau, Matthias Schmitz
  • Patent number: 10055363
    Abstract: A method for configuring an interface unit of a computer system with a first processor and a second processor stored in the interface unit. A data link is set up between the first processor and the second processor. A peripheral of the computer system is configured to store input data in an input data channel and to read output data from an output data channel, and the second processor is configured to read the input data from the input data channel and to store output data in the output data channel. A sequence of processor commands for the second processor is created such that a number of subsequences is created.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: August 21, 2018
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Jochen Sauer, Robert Leinfellner, Matthias Klemm, Thorsten Brehm, Robert Polnau, Matthias Schmitz
  • Publication number: 20180107808
    Abstract: In a method for operating a process computer that is at least intermittently connected to a user computer that executes a configuration program that can transmit executable binary code to the process computer, there is provision for a license check. The binary code has associated license information that indicates required licenses, and the configuration program is set up to receive an explicit identification of the process computer. The configuration program supplies an authorization program with the identification and with the license information. The authorization program establishes a permissibility by checking whether the available licenses associated with the explicit identification cover the licenses required according to license information, and the configuration program transmits the executable binary code to the process computer only if the authorization program has established the permissibility. The disclosure further relates to a user computer and a computer program product.
    Type: Application
    Filed: October 13, 2017
    Publication date: April 19, 2018
    Inventors: Elmar Schmitz, Albert Schwarte, Guido Schäfergockel, Thorsten Brehm
  • Patent number: 9633144
    Abstract: A method for performing an inventory of the hardware components connected to a control unit test system, wherein control units can be tested with the test system in an environment simulated by the test system by means of a model, and wherein the test system comprises at least one computer) and hardware components that are connected to one another by means of at least one network. For at least a portion of the hardware components, in particular of all simulation-specific hardware components, at least one item of component information that uniquely and digitally identifies the hardware component is read therefrom, and all identifying component information that has been read out is stored.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: April 25, 2017
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventors: Thorsten Brehm, Susanne Koehl, Juergen Paule, Juergen Klahold, Claus Diener
  • Publication number: 20160335101
    Abstract: A method for configuring an interface unit of a computer system with a first processor and a second processor stored in the interface unit. A data link is set up between the first processor and the second processor. A peripheral of the computer system is configured to store input data in an input data channel and to read output data from an output data channel, and the second processor is configured to read the input data from the input data channel and to store output data in the output data channel. A sequence of processor commands for the second processor is created such that a number of subsequences is created.
    Type: Application
    Filed: May 11, 2016
    Publication date: November 17, 2016
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Jochen SAUER, Robert LEINFELLNER, Matthias KLEMM, Thorsten BREHM, Robert POLNAU, Matthias SCHMITZ
  • Publication number: 20160335203
    Abstract: An interface unit for data exchange between a first processor of a computer system and a peripheral environment. The interface unit has a number of input data channels for receiving input data from the peripheral environment and a first access management unit. The access management unit is configured to receive a request for providing the input data, stored in the number of input data channels, from a first interface processor stored in the interface unit and from a second interface processor stored in the interface unit and to provide or not to provide the input data, stored in the number of input data channels, to the first interface processor and the second interface processor. A first priority and a second priority can be stored in the first access management unit.
    Type: Application
    Filed: May 11, 2016
    Publication date: November 17, 2016
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Jochen SAUER, Robert LEINFELLNER, Matthias KLEMM, Thorsten BREHM, Robert POLNAU, Matthias SCHMITZ
  • Publication number: 20140236560
    Abstract: A method for performing an inventory of the hardware components connected to a control unit test system, wherein control units can be tested with the test system in an environment simulated by the test system by means of a model, and wherein the test system comprises at least one computer) and hardware components that are connected to one another by means of at least one network. For at least a portion of the hardware components, in particular of all simulation-specific hardware components, at least one item of component information that uniquely and digitally identifies the hardware component is read therefrom, and all identifying component information that has been read out is stored.
    Type: Application
    Filed: February 21, 2014
    Publication date: August 21, 2014
    Applicant: dSPACE digital signal processing and control engineering GmbH
    Inventors: Thorsten BREHM, Susanne KOEHL, Juergen PAULE, Juergen KLAHOLD, Claus DIENER