Patents by Inventor Thow Phock Chua

Thow Phock Chua has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Via-sea layout integrated circuits
    Patent number: 6765296
    Abstract: An integrated circuit interconnect is provided having a dielectric layer disposed between a wide top metal line and a wide bottom metal line. A via-sea in the dielectric layer connects the wide top and wide bottom metal lines by means of a first via having a width, a second via having a width and spaced more than two widths away and less than four widths away from the first via.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: July 20, 2004
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Jae Soo Park, Chivukula Subramanyam, Thow Phock Chua, Hong Lim Lee
  • Via-sea layout integrated circuits
    Publication number: 20030127739
    Abstract: A method is provided for an integrated circuit interconnect having a dielectric layer disposed between a wide top metal line and a wide bottom metal line. A via-sea in the dielectric layer connects the wide top and wide bottom metal lines by means of a first via having a width, a second via having a width and spaced more than a width away and less than four widths away from the first via. The width and spacing of the vias reduce the occurrence of metal explosions which are known to reduce the power carrying capability of the power lines and adversely affect the performance of the devices in the integrated circuit.
    Type: Application
    Filed: January 10, 2002
    Publication date: July 10, 2003
    Inventors: Jae Soo Park, Chivukula Subramanyam, Thow Phock Chua, Hong Lim Lee