Patents by Inventor Thuan P. Le

Thuan P. Le has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Computationally efficient modular multiplication method and apparatus
    Patent number: 6434585
    Abstract: A computationally efficient multiplication method and apparatus for modular exponentiation. The apparatus uses a preload register, coupled to a multiplier at a second input port via a KN bit bus to load the value of the “a” multiplicand in the multiplier in a single clock pulse. The “b” multiplicand (which is also KN bits long) is supplied to the multiplier N bits at a time from a memory output port via an N bit bus coupled to a multiplier first input port. The multiplier multiplies the N bits of the “b” multiplicand by the KN bits of the “a” multiplicand and provides that product at a multiplier output N bits at a time, where it can be supplied to the memory via a memory input port.
    Type: Grant
    Filed: January 11, 2001
    Date of Patent: August 13, 2002
    Assignee: Rainbow Technologies, Inc.
    Inventors: Matthew Scott McGregor, Thuan P. Le
  • Computationally efficient modular multiplication method and apparatus
    Publication number: 20020103843
    Abstract: A computationally efficient multiplication method and apparatus for modular exponentiation. The apparatus uses a preload register, coupled to a multiplier at a second input port via a KN bit bus to load the value of the “a” multiplicand in the multiplier in a single clock pulse. The “b” multiplicand (which is also KN bits long) is supplied to the multiplier N bits at a time from a memory output port via an N bit bus coupled to a multiplier first input port. The multiplier multiplies the N bits of the “b” multiplicand by the KN bits of the “a” multiplicand and provides that product at a multiplier output N bits at a time, where it can be supplied to the memory via a memory input port.
    Type: Application
    Filed: January 11, 2002
    Publication date: August 1, 2002
    Inventors: Matthew Scott McGregor, Thuan P. Le
  • Computationally efficient modular multiplication method and apparatus
    Publication number: 20010010077
    Abstract: A computationally efficient multiplication method and apparatus for modular exponentiation. The apparatus uses a preload register, coupled to a multiplier at a second input port via a KN bit bus to load the value of the “a” multiplicand in the multiplier in a single clock pulse. The “b” multiplicand (which is also KN bits long) is supplied to the multiplier N bits at a time from a memory output port via an N bit bus coupled to a multiplier first input port. The multiplier multiplies the N bits of the “b” multiplicand by the KN bits of the “a” multiplicand and provides that product at a multiplier output N bits at a time, where it can be supplied to the memory via a memory input port.
    Type: Application
    Filed: January 11, 2001
    Publication date: July 26, 2001
    Inventors: Matthew Scott McGregor, Thuan P. Le