Patents by Inventor Thuc Huu Lam
Thuc Huu Lam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10992173Abstract: An integrated circuit (IC) comprises a regulator circuit, a bootstrap control circuit, and a gate driver that drives a transistor pair in buck or boost mode to switch current through an inductor. The IC has a VIN terminal coupled to receive a voltage generated from an AC power source, a STR terminal coupled to receive a voltage from a stored power source (e.g., a capacitor bank), and a HSB terminal that is capacitively coupled to the inductor. When bucking or boosting, the regulator circuit generates VDD supply voltage from the stored power source, supplies the VDD supply voltage onto the bootstrap control circuit, and the bootstrap control circuit generates a gate driver supply voltage that is supplied to the gate driver circuit. When not bucking or boosting, voltage on the HSB terminal is maintained between a voltage threshold from the AC power source without draining the stored power source.Type: GrantFiled: July 16, 2020Date of Patent: April 27, 2021Assignee: Active-Semi, Inc.Inventors: Thuc Huu Lam, Khanh Quang Dinh, Tung Van Nguyen, Hue Khac Trinh
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Patent number: 10985644Abstract: An integrated circuit (IC) comprises a regulator circuit, a bootstrap control circuit, and a gate driver that drives a transistor pair in buck or boost mode to switch current through an inductor. The IC has a VIN terminal coupled to receive a voltage generated from an AC power source, a STR terminal coupled to receive a voltage from a stored power source (e.g., a capacitor bank), and a HSB terminal that is capacitively coupled to the inductor. When bucking or boosting, the regulator circuit generates VDD supply voltage from the stored power source, supplies the VDD supply voltage onto the bootstrap control circuit, and the bootstrap control circuit generates a gate driver supply voltage that is supplied to the gate driver circuit. When not bucking or boosting, voltage on the HSB terminal is maintained between a voltage threshold from the AC power source without draining the stored power source.Type: GrantFiled: June 26, 2017Date of Patent: April 20, 2021Assignee: Active-Semi, Inc.Inventors: Thuc Huu Lam, Khanh Quang Dinh, Tung Van Nguyen, Hue Khac Trinh
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Publication number: 20200366183Abstract: An integrated circuit (IC) comprises a regulator circuit, a bootstrap control circuit, and a gate driver that drives a transistor pair in buck or boost mode to switch current through an inductor. The IC has a VIN terminal coupled to receive a voltage generated from an AC power source, a STR terminal coupled to receive a voltage from a stored power source (e.g., a capacitor bank), and a HSB terminal that is capacitively coupled to the inductor. When bucking or boosting, the regulator circuit generates VDD supply voltage from the stored power source, supplies the VDD supply voltage onto the bootstrap control circuit, and the bootstrap control circuit generates a gate driver supply voltage that is supplied to the gate driver circuit. When not bucking or boosting, voltage on the HSB terminal is maintained between a voltage threshold from the AC power source without draining the stored power source.Type: ApplicationFiled: July 16, 2020Publication date: November 19, 2020Inventors: Thuc Huu Lam, Khanh Quang Dinh, Tung Van Nguyen, Hue Khac Trinh
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Patent number: 10826480Abstract: An integrated circuit includes a gate driver circuit that controls high side and low side transistors to operate in buck or boost mode. In buck operating mode, after switching off the low side transistor, the gate driver circuit controls the high side transistor in a constant current mode. After the low side transistor is disabled and no longer conducts current, then the gate driver circuit controls the high side transistor to operate in full-enhancement mode. In boost operating mode, after switching off the high side transistor, the gate driver circuit controls the low side transistor in a constant current mode. After the high side transistor is disabled, then the gate driver circuit controls the low side switching transistor to operate in full-enhancement mode. In both buck and boost operation, the gate driver circuit operates without dead time in which both the high side and low side transistors are off.Type: GrantFiled: July 1, 2017Date of Patent: November 3, 2020Assignee: Active-Semi, Inc.Inventors: Thinh Ba Nguyen, Thien Khanh Luong, Thuc Huu Lam, Hue Khac Trinh
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Patent number: 10790812Abstract: An integrated circuit includes a gate driver circuit that controls high side and low side transistors to operate in buck or boost mode. In buck operating mode, after switching off the low side transistor, the gate driver circuit controls the high side transistor in a constant current mode. After the low side transistor is disabled and no longer conducts current, then the gate driver circuit controls the high side transistor to operate in full-enhancement mode. In boost operating mode, after switching off the high side transistor, the gate driver circuit controls the low side transistor in a constant current mode. After the high side transistor is disabled, then the gate driver circuit controls the low side switching transistor to operate in full-enhancement mode. In both buck and boost operation, the gate driver circuit operates without dead time in which both the high side and low side transistors are off.Type: GrantFiled: July 1, 2017Date of Patent: September 29, 2020Assignee: Active-Semi, Inc.Inventors: Thinh Ba Nguyen, Thien Khanh Luong, Thuc Huu Lam, Hue Khac Trinh
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Patent number: 10778079Abstract: An integrated circuit (IC) comprises a regulator circuit, a bootstrap control circuit, and a gate driver that drives a transistor pair in buck or boost mode to switch current through an inductor. The IC has a VIN terminal coupled to receive a voltage generated from an AC power source, a STR terminal coupled to receive a voltage from a stored power source (e.g., a capacitor bank), and a HSB terminal that is capacitively coupled to the inductor. When bucking or boosting, the regulator circuit generates VDD supply voltage from the stored power source, supplies the VDD supply voltage onto the bootstrap control circuit, and the bootstrap control circuit generates a gate driver supply voltage that is supplied to the gate driver circuit. When not bucking or boosting, voltage on the HSB terminal is maintained between a voltage threshold from the AC power source without draining the stored power source.Type: GrantFiled: June 26, 2017Date of Patent: September 15, 2020Assignee: Active-Semi, Inc.Inventors: Thuc Huu Lam, Khanh Quang Dinh, Tung Van Nguyen, Hue Khac Trinh
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Patent number: 10770894Abstract: A power loss protection integrated circuit includes a VIN terminal, a VOUT terminal, an STR terminal, a switch circuit (eFuse), a control circuit, and a prebiasing circuit. In a normal mode, current flows from a power source, into VIN, through the eFuse, out of VOUT, and to the output node. A switching converter of which the control circuit is a part is disabled. If a switch over condition then occurs, the eFuse is turned off and the switching converter starts operating. The switching converter receives energy from STR and drives the output node. Switch over is facilitated by prebiasing. Prior to switch over, the prebiasing circuit prebiases a control loop node as a function of eFuse current flow prior to switch over. When the switching converter begins operating, the node is already prebiased for the proper amount of current to be supplied by the switching converter onto the output node.Type: GrantFiled: July 31, 2018Date of Patent: September 8, 2020Assignee: Active-Semi, Inc.Inventors: Thuc Huu Lam, Hue Khac Trinh, Hiroshi Watanabe
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Publication number: 20200153242Abstract: A power loss protection integrated circuit includes a VIN terminal, a VOUT terminal, an STR terminal, a switch circuit (eFuse), a control circuit, and a prebiasing circuit. In a normal mode, current flows from a power source, into VIN, through the eFuse, out of VOUT, and to the output node. A switching converter of which the control circuit is a part is disabled. If a switch over condition then occurs, the eFuse is turned off and the switching converter starts operating. The switching converter receives energy from STR and drives the output node. Switch over is facilitated by prebiasing. Prior to switch over, the prebiasing circuit prebiases a control loop node as a function of eFuse current flow prior to switch over. When the switching converter begins operating, the node is already prebiased for the proper amount of current to be supplied by the switching converter onto the output node.Type: ApplicationFiled: January 14, 2020Publication date: May 14, 2020Inventors: Thuc Huu Lam, Hue Khac Trinh, Hiroshi Watanabe
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Patent number: 10090675Abstract: A power loss protection integrated circuit includes a VIN terminal, a VOUT terminal, an STR terminal, a switch circuit (eFuse), a control circuit, and a prebiasing circuit. In a normal mode, current flows from a power source, into VIN, through the eFuse, out of VOUT, and to the output node. A switching converter of which the control circuit is a part is disabled. If a switch over condition then occurs, the eFuse is turned off and the switching converter starts operating. The switching converter receives energy from STR and drives the output node. Switch over is facilitated by prebiasing. Prior to switch over, the prebiasing circuit prebiases a control loop node as a function of eFuse current flow prior to switch over. When the switching converter begins operating, the node is already prebiased for the proper amount of current to be supplied by the switching converter onto the output node.Type: GrantFiled: April 1, 2017Date of Patent: October 2, 2018Assignee: Active-Semi, Inc.Inventors: Thuc Huu Lam, Hue Khac Trinh, Hiroshi Watanabe