Patents by Inventor Thuc Tran Bui

Thuc Tran Bui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8094511
    Abstract: A non-volatile memory device comprises an interface circuit for receiving a plurality of signals. The plurality of signals provides multiplexed address and data and command signals in a serial format. An input buffer stores a plurality of the plurality of signals received in serial format and reconstitutes the address, data and command signals, and has an output. A command circuit receives the output of the input buffer and stores the command signals therefrom. An address circuit receives the output of the input buffer and stores the address signals therefrom. A data buffer circuit receives the output of the input buffer and stores the data signals therefrom. An array of non-volatile memory cells stores data from and provides data to the data buffer in response to address signals from the address decoder. A state machine is connected to the command circuit and controls the array of non-volatile memory cells.
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: January 10, 2012
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Douglas J. Lee, Cindy Ho Malamy, Kyle McMartin, Tam Minh Nguyen, Jih Min Niu, Hung Thanh Nguyen, Thuc Tran Bui, Conrado Canlas Canio, Richard Zimering
  • Publication number: 20100067311
    Abstract: A non-volatile memory device comprises an interface circuit for receiving a plurality of signals. The plurality of signals provides multiplexed address and data and command signals in a serial format. An input buffer stores a plurality of the plurality of signals received in serial format and reconstitutes the address, data and command signals, and has an output. A command circuit receives the output of the input buffer and stores the command signals therefrom. An address circuit receives the output of the input buffer and stores the address signals therefrom. A data buffer circuit receives the output of the input buffer and stores the data signals therefrom. An array of non-volatile memory cells stores data from and provides data to the data buffer in response to address signals from the address decoder. A state machine is connected to the command circuit and controls the array of non-volatile memory cells.
    Type: Application
    Filed: November 20, 2009
    Publication date: March 18, 2010
    Applicant: SILICON STORAGE TECHNOLOGY, INC.
    Inventors: Douglas J. LEE, Cindy Ho MALAMY, Kyle McMARTIN, Tam Minh NGUYEN, Jih-Min NIU, Hung Thanh NGUYEN, Thuc Tran BUI, Conrado Canlas CANIO, Richard ZIMERING
  • Patent number: 7660177
    Abstract: A non-volatile memory device comprises an interface circuit for receiving a plurality of signals. The plurality of signals provides multiplexed address and data and command signals in a serial format. An input buffer stores a plurality of the plurality of signals received in serial format and reconstitutes the address, data and command signals, and has an output. A command circuit receives the output of the input buffer and stores the command signals therefrom. An address circuit receives the output of the input buffer and stores the address signals therefrom. A data buffer circuit receives the output of the input buffer and stores the data signals therefrom. An array of non-volatile memory cells stores data from and provides data to the data buffer in response to address signals from the address decoder. A state machine is connected to the command circuit and controls the array of non-volatile memory cells.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: February 9, 2010
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Douglas J. Lee, Cindy Ho Malamy, Kyle McMartin, Tam Minh Nguyen, Jih-Min Niu, Hung Thanh Nguyen, Thuc Tran Bui, Conrado Canlas Canio, Richard Zimering
  • Publication number: 20090161465
    Abstract: A non-volatile memory device comprises an interface circuit for receiving a plurality of signals. The plurality of signals provides multiplexed address and data and command signals in a serial format. An input buffer stores a plurality of the plurality of signals received in serial format and reconstitutes the address, data and command signals, and has an output. A command circuit receives the output of the input buffer and stores the command signals therefrom. An address circuit receives the output of the input buffer and stores the address signals therefrom. A data buffer circuit receives the output of the input buffer and stores the data signals therefrom. An array of non-volatile memory cells stores data from and provides data to the data buffer in response to address signals from the address decoder. A state machine is connected to the command circuit and controls the array of non-volatile memory cells.
    Type: Application
    Filed: December 21, 2007
    Publication date: June 25, 2009
    Inventors: Douglas J. Lee, Cindy Ho Malamy, Kyle McMartin, Tam Minh Nguyen, Jih-Min Niu, Hung Thanh Nguyen, Thuc Tran Bui, Conrado Canlas Canio, Richard Zimering