Patents by Inventor Thurman John Rodgers

Thurman John Rodgers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9624094
    Abstract: A microelectronic system including hydrogen barriers and copper pillars for wafer level packaging and method of fabricating the same are provided. Generally, the method includes: forming an insulating hydrogen barrier over a surface of a first chip; exposing at least a portion of an electrical contact electrically coupled to a component in the first chip by removing a portion of the insulating hydrogen barrier, the component including a material susceptible to degradation by hydrogen; forming a conducting hydrogen barrier over at least the exposed portion of the electrical contact; and forming a copper pillar over the conducting hydrogen barrier. In one embodiment, the material susceptible to degradation is lead zirconate titanate (PZT) and the microelectronic systems device is a ferroelectric random access memory including a ferroelectric capacitor with a PZT ferroelectric layer. Other embodiments are also disclosed.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: April 18, 2017
    Assignee: Cypress Semiconductor Corporation
    Inventors: Shan Sun, Ali Keshavarzi, Thomas Davenport, Thurman John Rodgers
  • Patent number: 7660086
    Abstract: An improved ESD protection device, integrated circuit and method for programmably altering a sensitivity of the ESD protection device is provided herein. More specifically, an active shunt ESD protection device is provided with an improved trigger circuit design. The improved trigger circuit design enables the sensitivity of the ESD protection device to be altered by providing a variety of programmable elements for adjusting an RC time constant of a slew rate detector contained therein. The programmable elements allow the RC time constant to be altered at the wafer or package level, and avoid the significant time and cost typically associated with conventional trial-and-error adjustment procedures.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: February 9, 2010
    Assignee: Cypress Semiconductor Corporation
    Inventors: Thurman John Rodgers, Babak Taheri, Dan Zupcau
  • Patent number: 7507944
    Abstract: A non-planar frame base for an image sensor.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: March 24, 2009
    Assignee: Cypress Semiconductor Corporation
    Inventors: Daniel Arnzen, Thurman John Rodgers
  • Publication number: 20070285854
    Abstract: An improved ESD protection device, integrated circuit and method for programmably altering a sensitivity of the ESD protection device is provided herein. More specifically, an active shunt ESD protection device is provided with an improved trigger circuit design. The improved trigger circuit design enables the sensitivity of the ESD protection device to be altered by providing a variety of programmable elements for adjusting an RC time constant of a slew rate detector contained therein. The programmable elements allow the RC time constant to be altered at the wafer or package level, and avoid the significant time and cost typically associated with conventional trial-and-error adjustment procedures.
    Type: Application
    Filed: June 8, 2006
    Publication date: December 13, 2007
    Applicant: CYPRESS SEMICONDUCTOR CORP.
    Inventors: Thurman John Rodgers, Babak Taheri, Dan Zupcau