Abstract: A method for forming a flip-chip joinable substrate having non-plated-on contact pads. The substrate has an external metal foil layer upon a dielectric layer upon a patterned internal metal layer having an internal contact area. An area of the external metal foil layer above the internal contact area is selected. A microvia cavity extending to the internal contact area is perforated centrally within the selected area and is filled with a mass of conductive paste forming an external contact pad. The external contact pad is used as an etch mask for removing the adjacent external metal foil.

Abstract: A flip-chip joinable substrate having non-plated-on contact pads. The substrate has an external metal foil layer upon a dielectric layer upon a patterned internal metal layer having an internal contact area. An area of the external metal foil layer above the internal contact area is selected. A microvia cavity extending to the internal contact area is perforated centrally within the selected area and is filled with a mass of conductive paste forming an external contact pad. The external contact pad is used as an etch mask for removing the adjacent external metal foil.

Abstract: Integrated circuit chips (18, 42, or 56) are packaged within openings formed in a substrate such as PCMCIA Card (20, 40, or 54), thus allowing compliance with overall width dimension requirements for standardized electronic components. The arrangement has the advantages that thermal coefficient of expansion of the chips and cards match, and that a sturdy, multilayer ceramic substrate is used for electrical connection to electronic devices such as laptops, palmtops, and the like. In addition, a second integrated circuit chip (68) can be connected directly to the embedded chip (56), thereby allowing two chips to be accommodated in a card (54) at the same location and allowing chip-to-chip electrical communication. A variety of electrical bonding methods joining the embedded chip to the card can be employed. In addition, a variety of thermal conduction arrangements can be used for cooling the embedded integrated circuit chip.

Abstract: The present invention increases real estate by providing non-annular lands which do not completely encircle the through holes. The non-annular lands are non-annular, that is they do not extend 360.degree. around the through hole. Preferably the non-annular lands contact no more than one side of the through holes thereby providing real estate not otherwise available using conventional lands. The present invention also relates to a method for producing such Non-annular lands.

Abstract: A method of forming a multi-layer circuit board or card. The method includes the step of forming a plurality of conductive planes. The conductive planes include ground, signal, or power planes. At least one through hole is formed through at least one of the conductive planes. An electrically conductive material is deposited onto an inside surface of the at least one through hole to form a plated through hole. At least one thermal relief passage is formed at least in the at least one of the conductive planes for preventing the diffusion of heat throughout the circuit board or card during the securing or removal or chips or other components to the circuit board or card by heating the material deposited in the at least one through hole to a temperature above its melting point. The at least one thermal relief passage is located in the vicinity of the at least one through hole and is free from electrical connection therewith.

Abstract: Multiple circuit functions embodied in electrical circuit lines and areas are supported by a multilayered printed circuit board of various lengths and widths (defining "x" and "y" directions) and of various thicknesses (defining a "z" direction) all on a single board. Several ways of achieving such variations in thickness include providing two layer subassemblies arranged in an alternate and intermediate manner, one subassembly being adapted to support electrical circuit lines and areas, and the other subassembly being formed of thin film dielectric material of various precalculated thicknesses. Another way of achieving a variation in thickness is to limit the surface covered by circuit lines with a pre-calculated core thickness.

Abstract: A multi-layer printed circuit board or card including at least one passage in at least one of the layers of the circuit board or card for preventing the diffusion of heat throughout the circuit board or card during the securing or removal of components in plated through holes in the circuit board or card by the heating of the plating material to a temperature above a melting point of the plating material.