Patents by Inventor Thurston Bryce Youngs, Jr.

Thurston Bryce Youngs, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6946329
    Abstract: A flexible, compliant layer of a single low modulus material for connecting a chip die directly to a circuit card without encapsulation. The flexible compliant layer provides stress relief caused by CTE thermal mismatch in chip die and circuit card. An array of copper plated vias are formed in said compliant layer with each via terminating on opposing surfaces of the layer in copper pads. Rather than copper, other metals, such as gold or nickel, may also be used. An array of holes may be positioned between said array of vias to provide additional resiliency. The plated vias may be angled with respect to said opposing surfaces to allow additional vertical and horizontal stress relief. Connection of the pads on one surface to high melt C-4 solder balls or columns on a chip die results in solder filled vias. Low melt solder connection of the pads on the other surface to a circuit card allows non-destructive rework of the cards.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: September 20, 2005
    Assignee: International Business Machines Corporation
    Inventors: Mark Vincent Pierson, Jennifer Rebecca Sweterlitsch, Charles Gerard Woychik, Thurston Bryce Youngs, Jr.
  • Patent number: 6774315
    Abstract: A flexible, compliant layer of a single low modulus material for connecting a chip die directly to a circuit card without encapsulation. The flexible compliant layer provides stress relief caused by CTE thermal mismatch in chip die and circuit card. An array of copper plated vias are formed in said compliant layer with each via terminating on opposing surfaces of the layer in copper pads. Rather than copper, other metals, such as gold or nickel, may also be used. An array of holes may be positioned between said array of vias to provide additional resiliency. The plated vias may be angled with respect to said opposing surfaces to allow additional vertical and horizontal stress relief. Connection of the pads on one surface to high melt C-4 solder balls or columns on a chip die results in solder filled vias. Low melt solder connection of the pads on the other surface to a circuit card allows non-destructive rework of the cards.
    Type: Grant
    Filed: May 24, 2000
    Date of Patent: August 10, 2004
    Assignee: International Business Machines Corporation
    Inventors: Mark Vincent Pierson, Jennifer Rebecca Sweterlitsch, Charles Gerard Woychik, Thurston Bryce Youngs, Jr.
  • Patent number: 6156165
    Abstract: An integrated circuit package derives increased mechanical robustness and electrical reliability consistent with increased heat dissipation capacity by edge bonding of integrated circuit chips onto a substrate such as a chip, board, module or another integrated circuit by forming a solder or conductive adhesive bond between a bonding/contact pad on the substrate and a metallization feature extending at least on limited opposing areas of major surfaces of the chip and, preferably, across the edge of the chip. Thermally conducting material contained in a cap may provide additional, distributed support for the chip by a combination of viscosity and density providing buoyancy of the chips. Alternatively, a cap may be provided which further stabilizes the edge-mounting of chips while increasing velocity of cooling fluid against the chips.
    Type: Grant
    Filed: October 20, 1999
    Date of Patent: December 5, 2000
    Assignee: International Business Machines Corporation
    Inventors: Mark Vincent Pierson, Thurston Bryce Youngs, Jr.
  • Patent number: 6059939
    Abstract: An integrated circuit package derives increased mechanical robustness and electrical reliability consistent with increased heat dissipation capacity by edge bonding of integrated circuit chips onto a substrate such as a chip, board, module or another integrated circuit by forming a solder or conductive adhesive bond between a bonding/contact pad on the substrate and a metallization feature extending at least on limited opposing areas of major surfaces of the chip and, preferably, across the edge of the chip. Thermally conducting material contained in a cap may provide additional, distributed support for the chip by a combination of viscosity and density providing buoyancy of the chips. Alternatively, a cap may be provided which further stabilizes the edge-mounting of chips while increasing velocity of cooling fluid against the chips.
    Type: Grant
    Filed: January 5, 1999
    Date of Patent: May 9, 2000
    Assignee: International Business Machines Corporation
    Inventors: Mark Vincent Pierson, Thurston Bryce Youngs, Jr.
  • Patent number: 5903437
    Abstract: An integrated circuit package derives increased mechanical robustness and electrical reliability consistent with increased heat dissipation capacity by edge bonding of integrated circuit chips onto a substrate such as a chip, board, module or another integrated circuit by forming a solder or conductive adhesive bond between a bonding/contact pad on the substrate and a metallization feature extending at least on limited opposing areas of major surfaces of the chip and, preferably, across the edge of the chip. Thermally conducting material contained in a cap may provide additional, distributed support for the chip by a combination of viscosity and density providing buoyancy of the chips. Alternatively, a cap may be provided which further stabilizes the edge-mounting of chips while increasing velocity of cooling fluid against the chips.
    Type: Grant
    Filed: January 17, 1997
    Date of Patent: May 11, 1999
    Assignee: International Business Machines Corporation
    Inventors: Mark Vincent Pierson, Thurston Bryce Youngs, Jr.
  • Patent number: 5818107
    Abstract: An integrated circuit package derives increased mechanical robustness and electrical reliability consistent with increased heat dissipation capacity by bonding of integrated circuit chips into a chip stack and bonding the chip stack onto a substrate such as a chip, board, module or another integrated circuit by forming a solder or conductive adhesive bond between a bonding/contact pad on the substrate and a metallization feature extending at least on limited opposing areas of major surfaces of the chip and across the edge of the chip. Thickness of the metallization feature and bonding material provides a "stand-off" between chips allowing improved heat dissipation by fluid flow, conduction through a viscous thermally conducting material and/or a heat sink disposed between chips in the stack.
    Type: Grant
    Filed: January 17, 1997
    Date of Patent: October 6, 1998
    Assignee: International Business Machines Corporation
    Inventors: Mark Vincent Pierson, Thurston Bryce Youngs, Jr.
  • Patent number: 5743004
    Abstract: A multi-layer printed circuit board or card including at least one passage in at least one of the layers of the circuit board or card for preventing the diffusion of heat throughout the circuit board or card during the securing or removal of components in plated through holes in the circuit board or card by the heating of the plating material to a temperature above a melting point of the plating material.
    Type: Grant
    Filed: July 21, 1995
    Date of Patent: April 28, 1998
    Assignee: International Business Machines Corporation
    Inventors: Ivan Ivor Chobot, John Arthur Covert, Randy Lee Haight, Keith David Mansfield, Donald Wayne Miller, Reinaldo Anthony Neira, Alexander Petrovich, Paul Camilo Sviedrys, Louise Ann Tiemann, Gerald Arthur Valenta, Thurston Bryce Youngs, Jr.
  • Patent number: 5713127
    Abstract: The present invention increases real estate by providing non-annular lands which do not completely encircle the through holes. The non-annular lands are non-annular, that is they do not extend 360.degree. around the through hole. Preferably the non-annular lands contact no more than one side of the through holes thereby providing real estate not otherwise available using conventional lands. The present invention also relates to a method for producing such Non-annular lands.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: February 3, 1998
    Assignee: International Business Machines Corporation
    Inventors: Ivan Ivor Chobot, Robert Anthony Martone, Thurston Bryce Youngs, Jr.