Patents by Inventor Thushara Hewavithana

Thushara Hewavithana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180316523
    Abstract: An inter-carrier interference (ICI) mitigation circuit associated with an orthogonal frequency division multiplexing (OFDM) receiver is disclosed. The ICI mitigation circuit comprises an ICI cancellation circuit configured to receive an OFDM symbol associated with an OFDM signal and determine an ICI associated with one or more OFDM subcarriers within the OFDM symbol. The ICI cancellation circuit is further configured to cancel the ICI from the one or more OFDM subcarriers associated with the OFDM symbol, in order to generate a desired OFDM symbol. In some embodiments, the ICI is determined and cancelled at the ICI cancellation circuit, in accordance with a predetermined ICI mitigation algorithm.
    Type: Application
    Filed: June 30, 2017
    Publication date: November 1, 2018
    Inventors: Thushara Hewavithana, Bernard Arambepola
  • Publication number: 20180287660
    Abstract: A cable modem system for discovering interference groups (IGs) includes an infrastructure and a cable modem termination system (CMTS). The infrastructure is for transferring data. The CMTS is configured to initiate generation of test signals by a set of cable modems (CMs), obtain a set of test measurements for the set of CMs, discover interference groups (IGs) of the set of CMs based on the obtained set of test measurements and assign a plurality of upstream and downstream channels for the set of CMs that use orthogonal frequency division multiplexing (OFDM) based on the discovered IGs.
    Type: Application
    Filed: March 31, 2017
    Publication date: October 4, 2018
    Inventors: Bernard Arambepola, Thushara Hewavithana, Noam Tal, Shaul Shulman
  • Publication number: 20180287842
    Abstract: The disclosure generally relates to a method and apparatus for frequency interleaving. Specifically, an embodiment of the disclosure relates to a communication system having one or more antennas, a radio, a memory circuit, and a processor circuit. The antennas can be used to communicate signals or to comply with different transmission protocols. The radio can be configured to send and receive radio signals. The memory can communicate with the processor circuit and contain instructions for the processor circuit to write data carriers along a plurality of rows and columns of a 2-D store in bit-reversed order and read the columns of 2-D store.
    Type: Application
    Filed: January 29, 2018
    Publication date: October 4, 2018
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Parveen K. Shukla, Thushara Hewavithana, Sahan S. Gamage
  • Patent number: 9954708
    Abstract: The disclosure generally relates to a method and apparatus for frequency interleaving. Specifically, an embodiment of the disclosure relates to a communication system having one or more antennas, a radio, a memory circuit, and a processor circuit. The antennas can be used to communicate signals or to comply with different transmission protocols. The radio can be configured to send and receive radio signals. The memory can communicate with the processor circuit and contain instructions for the processor circuit to write data carriers along a plurality of rows and columns of a 2-D store in bit-reversed order and read the columns of 2-D store.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: April 24, 2018
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Parveen K. Shukla, Thushara Hewavithana, Sahan S. Gamage
  • Patent number: 9954712
    Abstract: Methods and architectures for blind detection of physical layer control (PLC) signaling for transmitters and receivers having respective misaligned inverse fast Fourier transforms (IFFTs) and (FFTs) includes opening a frequency tracking offset calibration circuit, estimating or calculating a phase discontinuity due to FFT misalignment, closing the frequency tracking offset calibration circuit and applying a frequency correction that includes a frequency offset less the calculated or estimated phase discontinuity.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: April 24, 2018
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Thushara Hewavithana, Sahan S. Gamage, Shaul Shulman
  • Publication number: 20180048417
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Application
    Filed: October 23, 2017
    Publication date: February 15, 2018
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Publication number: 20170272201
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Application
    Filed: April 5, 2017
    Publication date: September 21, 2017
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Patent number: 9742610
    Abstract: One embodiment provides an apparatus. The apparatus includes an optimization module configured to determine a guard interval remainder based, at least in part on a comparison of an allowable microreflection interference level and an actual microreflection interference level; and a windowing module configured to window an OFDM (orthogonal frequency division multiplexed) symbol utilizing the guard interval remainder. The apparatus may further include a channel estimator module configured to determine a predicted channel frequency response based, at least in part, on a probing symbol; and a pre-equalizer module configured to pre-equalize the OFDM symbol based, at least in part, on the predicted channel frequency response.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: August 22, 2017
    Assignee: INTEL CORPORATION
    Inventors: Bernard Arambepola, Parveen K. Shukla, Thushara Hewavithana
  • Patent number: 9634795
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: April 25, 2017
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Patent number: 9515687
    Abstract: Apparatus and methods are described to perform inter carrier interference (ICI) reduction or cancellation in an orthogonal frequency domain multiplexing (OFDM) receiver. A first and a second stage of ICI cancellation may be performed before inputting an estimated transmitted data carrier for forward error correction. Forward error correction may include a signal re-correction and reconstruction of the estimated transmitted data carrier prior to a further stage of ICI cancellation.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: December 6, 2016
    Assignee: Intel Corporation
    Inventors: Thushara Hewavithana, Parveen K. Shukla, Bernard Arambepola
  • Publication number: 20160285664
    Abstract: One embodiment provides an apparatus. The apparatus includes an optimization module configured to determine a guard interval remainder based, at least in part on a comparison of an allowable microreflection interference level and an actual microreflection interference level; and a windowing module configured to window an OFDM (orthogonal frequency division multiplexed) symbol utilizing the guard interval remainder. The apparatus may further include a channel estimator module configured to determine a predicted channel frequency response based, at least in part, on a probing symbol; and a pre-equalizer module configured to pre-equalize the OFDM symbol based, at least in part, on the predicted channel frequency response.
    Type: Application
    Filed: March 14, 2016
    Publication date: September 29, 2016
    Applicant: Intel Corporation
    Inventors: BERNARD ARAMBEPOLA, PARVEEN K. SHUKLA, THUSHARA HEWAVITHANA
  • Patent number: 9385905
    Abstract: Block-based interleaving to process a block of sub-carriers as a two-dimensional array defined by a frequency dimension and a time dimension. For each symbol of the array a cell is selected at each frequency index of the array in a diagonal wrap-around fashion. The array may be traversed with a modulo-based index computed as a function of an incrementing frequency index, a symbol index, and a modulus defined by a depth of the array. Cells may be selected as indicated by the frequency and time indices, and/or as indicated by a bit-reversed representation of the frequency index and/or the time index. A block interleaver may be configured to time interleave without impacting frequency, or interleave in time and frequency. Frequency interleaving may performed with the bit-reversed representation of the frequency index.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: July 5, 2016
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Thushara Hewavithana
  • Patent number: 9288094
    Abstract: One embodiment provides an apparatus. The apparatus includes an optimization module configured to determine a guard interval remainder based, at least in part on a comparison of an allowable microreflection interference level and an actual microreflection interference level; and a windowing module configured to window an OFDM (orthogonal frequency division multiplexed) symbol utilizing the guard interval remainder. The apparatus may further include a channel estimator module configured to determine a predicted channel frequency response based, at least in part, on a probing symbol; and a pre-equalizer module configured to pre-equalize the OFDM symbol based, at least in part, on the predicted channel frequency response.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: March 15, 2016
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Parveen K. Shukla, Thushara Hewavithana
  • Patent number: 9130787
    Abstract: According to various embodiments, devices and methods disclosed herein include performing, using a processor, a linear operation on a first plurality of channel frequency responses and a plurality of corresponding predictor coefficients to estimate a new channel frequency response. Each of the plurality of corresponding predictor coefficients may be updated based on an error value and a second plurality of channel frequency responses to obtain an updated predictor coefficient. The error value may be computed based on an estimated current channel frequency response and a predicted current channel frequency response. The new channel frequency response may be used to equalize a received modulated signal including a single-carrier modulated signal, e.g., a signal modulated using a vestigial sideband modulation scheme, or a quadrature amplitude modulation scheme.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: September 8, 2015
    Assignee: INTEL CORPORATION
    Inventors: Thushara Hewavithana, Bernard Arambepola, Sahan S. Gamage, Parveen K. Shukla
  • Patent number: 9106497
    Abstract: In an Orthogonal Frequency Division Multiplex (“OFDM”) system, the problem of an interferer reducing the signal-to-noise ratio of a signal can be mitigated by generating an interferer-correction signal and subtracting it from the signal to be processed. The amplitude, frequency and phase of the interferences are determined first. The frequency is estimated by averaging the squared-magnitude of multiple FFTs of the incoming signal and then locating the spectral peaks. The phase and amplitude may be estimated from this FFT outputs or through a process of correlation in the time domain. The interferer-correction signal is generated from the estimated amplitude, frequency, and phase. The correction to be subtracted from the main signal in order to reduce the effect of the interference may be generated in the time or frequency domain. The subtraction of the correction may also be implemented in the time or frequency domains.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: August 11, 2015
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Thushara Hewavithana
  • Publication number: 20150172088
    Abstract: One embodiment provides an apparatus. The apparatus includes an optimization module configured to determine a guard interval remainder based, at least in part on a comparison of an allowable microreflection interference level and an actual microreflection interference level; and a windowing module configured to window an OFDM (orthogonal frequency division multiplexed) symbol utilizing the guard interval remainder. The apparatus may further include a channel estimator module configured to determine a predicted channel frequency response based, at least in part, on a probing symbol; and a pre-equalizer module configured to pre-equalize the OFDM symbol based, at least in part, on the predicted channel frequency response.
    Type: Application
    Filed: December 18, 2013
    Publication date: June 18, 2015
    Inventors: Bernard Arambepola, Parveen K. Shukla, Thushara Hewavithana
  • Patent number: 9054933
    Abstract: A system according to one embodiment includes a demodulator configured to receive an orthogonal frequency division multiplexed (OFDM) modulated signal comprising a current symbol and a sequence of previous symbols, each of the symbols comprising one or more pilot sub-carriers and one or more data sub-carriers; a phase angle computation circuit coupled to the demodulator, the phase angle computation circuit configured to compute a first mean, the first mean computed from the phase angle of one or more of the pilot sub-carriers of a predetermined number of the previous symbols; a predictive filter circuit coupled to the phase angle computation circuit, the predictive filter circuit configured to compute a second mean, the second mean estimating the phase angle of one or more sub-carriers of the current symbol, the estimation based on the first mean; and a phase noise cancelling circuit coupled to the predictive filter circuit, the phase noise cancelling circuit configured to correct the phase of one or more sub
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: June 9, 2015
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Thushara Hewavithana, Parveen K. Shukla, Sahan S. Gamage
  • Publication number: 20150139351
    Abstract: The disclosure generally relates to a method and apparatus for frequency interleaving. Specifically, an embodiment of the disclosure relates to a communication system having one or more antennas, a radio, a memory circuit, and a processor circuit. The antennas can be used to communicate signals or to comply with different transmission protocols. The radio can be configured to send and receive radio signals. The memory can communicate with the processor circuit and contain instructions for the processor circuit to write data carriers along a plurality of rows and columns of a 2-D store in bit-reversed order and read the columns of 2-D store.
    Type: Application
    Filed: November 15, 2013
    Publication date: May 21, 2015
    Inventors: Bernard Arambepola, Parveen K. Shukla, Thushara Hewavithana, Sahan S. Gamage
  • Patent number: 8982724
    Abstract: A system and method are provided for implementing a peak-to-average power ratio (PAPR) reduction scheme for Orthogonal Frequency-Division Multiple Access (OFDMA) modulation. A unique PAPR reduction scheme for OFDMA modulation for systems operated according to a DOCSIS standard achieves results similar to those attributable to tone reservation schemes in a manner that does not negatively affect an amount of available data capacity, particularly in implementations with limited numbers of subcarriers. The disclosed systems and methods are particularly adaptable to next generation cable gateways and/or next generation cable modems. These next generation cable gateways and/or cable modems may find particular utility in advanced hybrid fiber/coaxial cable systems. The adaptable cable gateways/modems may include a cable gateway system-on-chip (SOC) configuration. The disclosed schemes may be applicable to OFDM modulation. For OFDM, however, the known tone reservation algorithms also may be employed.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: March 17, 2015
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Parveen Shukla, Thushara Hewavithana, Sahan Gamage
  • Patent number: 8938015
    Abstract: A system according to one embodiment includes a demodulator configured to receive an OFDM modulated signal over a channel, the signal including a sequence of symbols, each of the symbols including one or more pilot carriers and one or more data carriers; a time filtering and interpolation circuit coupled to the demodulator, the time filtering and interpolation circuit configured to estimate the frequency response of the channel based on time filtering and interpolation of the pilot carriers; a phase slope correction circuit configured to apply each of a plurality of phase slope corrections to the frequency response and to the data carriers; a frequency filtering and interpolation circuit configured to calculate frequency response estimates of the channel at data carrier frequencies based on frequency filtering and interpolation of the phase slope corrected frequency response; an equalization circuit configured to equalize the phase slope corrected data carriers based on the calculated frequency response estim
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: January 20, 2015
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Thushara Hewavithana