Abstract: There is provided a method for managing heterogeneous cloud data storage systems across heterogeneous cloud computing systems. The method comprises: defining rules that govern storing of data in one or more of a plurality of heterogeneous cloud data storage systems; receiving complete data from a user's computer; splitting the complete data; and storing the split data according to the defined rules into the plurality of heterogeneous cloud data storage systems.

Abstract: A dual chipset architecture, a method of operating a scheduler for a dual chipset architecture, and a computer program product for operating a scheduler for a dual chipset architecture. In an embodiment, the dual chipset architecture comprises a high performance processor, a low performance processor, and a scheduler for the processors. The scheduler is provided for determining an expected data traffic flow to the chipset, and for selectively enabling the high and low performance processors, based on this expected data flow, ahead of this expected data flow reaching the chipset. In one embodiment, a specified data traffic indicator is associated with the expected data traffic flow, and the scheduler uses this specified data traffic indicator to determine the expected data traffic flow. In an embodiment, this specified data traffic indicator is a value for a defined window size for the expected data flow.

Abstract: A dual chipset architecture, a method of operating a scheduler for a dual chipset architecture, and a computer program product for operating a scheduler for a dual chipset architecture. In an embodiment, the dual chipset architecture comprises a high performance processor, a low performance processor, and a scheduler for the processors. The scheduler is provided for determining an expected data traffic flow to the chipset, and for selectively enabling the high and low performance processors, based on this expected data flow, ahead of this expected data flow reaching the chipset. In one embodiment, a specified data traffic indicator is associated with the expected data traffic flow, and the scheduler uses this specified data traffic indicator to determine the expected data traffic flow. In an embodiment, this specified data traffic indicator is a value for a defined window size for the expected data flow.

Abstract: There is provided a method for operating of network cards in computing systems. The method comprises: detecting resource utilization of all network cards of computing systems connected via the one or more networks; monitoring network statistics of the network, the monitoring the network statistics including: evaluating whether a resource utilization of each network card connected to the one more networks is larger than a threshold; and determining an operation of each network card connected to the network according to and the detected resource utilization and the monitored network statistics.

Abstract: A dual chipset architecture, a method of operating a scheduler for a dual chipset architecture, and a computer program product for operating a scheduler for a dual chipset architecture. In an embodiment, the dual chipset architecture comprises a high performance processor, a low performance processor, and a scheduler for the processors. The scheduler is provided for determining an expected data traffic flow to the chipset, and for selectively enabling the high and low performance processors, based on this expected data flow, ahead of this expected data flow reaching the chipset. In one embodiment, a specified data traffic indicator is associated with the expected data traffic flow, and the scheduler uses this specified data traffic indicator to determine the expected data traffic flow. In an embodiment, this specified data traffic indicator is a value for a defined window size for the expected data flow.

Abstract: There are provided a system and a computer program product for operating of network cards in computing systems. The computing systems detect resource utilization of all network cards of physical servers connected via one or more networks. The computing systems monitor network statistics of the network. The computing systems determine an operation of each network card connected to the network according to the monitored network statistics.

Abstract: A dual chipset architecture, a method of operating a scheduler for a dual chipset architecture, and a computer program product for operating a scheduler for a dual chipset architecture. In an embodiment, the dual chipset architecture comprises a high performance processor, a low performance processor, and a scheduler for the processors. The scheduler is provided for determining an expected data traffic flow to the chipset, and for selectively enabling the high and low performance processors, based on this expected data flow, ahead of this expected data flow reaching the chipset. In one embodiment, a specified data traffic indicator is associated with the expected data traffic flow, and the scheduler uses this specified data traffic indicator to determine the expected data traffic flow. In an embodiment, this specified data traffic indicator is a value for a defined window size for the expected data flow.

Abstract: There are provided a system and a computer program product for managing heterogeneous cloud data storage systems. A computing system defines rules that govern a plurality of heterogeneous cloud data storage systems. The computing system receives complete data from a user's computer. The computing system splits the complete data. The computing system stores the split data according to the defined rules into the plurality of heterogeneous cloud data storage systems.

Abstract: A dual chipset architecture, a method of operating a scheduler for a dual chipset architecture, and a computer program product for operating a scheduler for a dual chipset architecture. In an embodiment, the dual chipset architecture comprises a high performance processor, a low performance processor, and a scheduler for the processors. The scheduler is provided for determining an expected data traffic flow to the chipset, and for selectively enabling the high and low performance processors, based on this expected data flow, ahead of this expected data flow reaching the chipset. In one embodiment, a specified data traffic indicator is associated with the expected data traffic flow, and the scheduler uses this specified data traffic indicator to determine the expected data traffic flow. In an embodiment, this specified data traffic indicator is a value for a defined window size for the expected data flow.

Abstract: A dual chipset architecture, a method of operating a scheduler for a dual chipset architecture, and a computer program product for operating a scheduler for a dual chipset architecture. In an embodiment, the dual chipset architecture comprises a high performance processor, a low performance processor, and a scheduler for the processors. The scheduler is provided for determining an expected data traffic flow to the chipset, and for selectively enabling the high and low performance processors, based on this expected data flow, ahead of this expected data flow reaching the chipset. In one embodiment, a specified data traffic indicator is associated with the expected data traffic flow, and the scheduler uses this specified data traffic indicator to determine the expected data traffic flow. In an embodiment, this specified data traffic indicator is a value for a defined window size for the expected data flow.

Abstract: There are provided a system and a computer program product for managing heterogeneous cloud data storage systems. A computing system defines rules that govern a plurality of heterogeneous cloud data storage systems. The computing system receives complete data from a user's computer. The computing system splits the complete data. The computing system stores the split data according to the defined rules into the plurality of heterogeneous cloud data storage systems.

Abstract: There is provided a method for managing heterogeneous cloud data storage systems across heterogeneous cloud computing systems. The method comprises: defining rules that govern storing of data in one or more of a plurality of heterogeneous cloud data storage systems; receiving complete data from a user's computer; splitting the complete data; and storing the split data according to the defined rules into the plurality of heterogeneous cloud data storage systems.

Abstract: There is provided a method for operating of network cards in computing systems. The method comprises: detecting resource utilization of all network cards of computing systems connected via the one or more networks; monitoring network statistics of the network, the monitoring the network statistics including: evaluating whether a resource utilization of each network card connected to the one more networks is larger than a threshold; and determining an operation of each network card connected to the network according to and the detected resource utilization and the monitored network statistics.

Abstract: There are provided a system and a computer program product for operating of network cards in computing systems. The computing systems detect resource utilization of all network cards of physical servers connected via one or more networks. The computing systems monitor network statistics of the network. The computing systems determine an operation of each network card connected to the network according to the monitored network statistics.

Abstract: A dual chipset architecture, a method of operating a scheduler for a dual chipset architecture, and a computer program product for operating a scheduler for a dual chipset architecture. In an embodiment, the dual chipset architecture comprises a high performance processor, a low performance processor, and a scheduler for the processors. The scheduler is provided for determining an expected data traffic flow to the chipset, and for selectively enabling the high and low performance processors, based on this expected data flow, ahead of this expected data flow reaching the chipset. In one embodiment, a specified data traffic indicator is associated with the expected data traffic flow, and the scheduler uses this specified data traffic indicator to determine the expected data traffic flow. In an embodiment, this specified data traffic indicator is a value for a defined window size for the expected data flow.

Abstract: A dual chipset architecture, a method of operating a scheduler for a dual chipset architecture, and a computer program product for operating a scheduler for a dual chipset architecture. In an embodiment, the dual chipset architecture comprises a high performance processor, a low performance processor, and a scheduler for the processors. The scheduler is provided for determining an expected data traffic flow to the chipset, and for selectively enabling the high and low performance processors, based on this expected data flow, ahead of this expected data flow reaching the chipset. In one embodiment, a specified data traffic indicator is associated with the expected data traffic flow, and the scheduler uses this specified data traffic indicator to determine the expected data traffic flow. In an embodiment, this specified data traffic indicator is a value for a defined window size for the expected data flow.