Abstract: A display panel and a driving method thereof and a display device are provided. The display panel includes a pixel circuit and a light-emitting element, the pixel circuit including a driving transistor, a first reset transistor and a second reset transistor; the first reset transistor configured to reset the gate electrode of the driving transistor, and the second reset transistor configured to reset the first electrode of the light-emitting element; a first initialization signal line connected with the gate electrode of the driving transistor through the first reset transistor; and a first power line. The first reset transistor is a dual-gate transistor and includes a first channel and a second channel which are connected by a first conductive connection portion; an orthographic projection of the first conductive connection portion on the base substrate is completely within an orthographic projection of the first power line on the base substrate.

Abstract: A display substrate has sub-pixels. Each column of sub-pixels includes first and second sub-pixels alternately arranged. The display substrate includes a base, a second source-drain metal layer including first and second connection portions, and a first source-drain metal layer including first and second data lines alternately arranged. A pixel driving circuit of each first sub-pixel is connected to a second end of a first connection portion, and a first end there is connected to a corresponding first data line. A pixel driving circuit of each second sub-pixel is connected to a second end of a second connection portion, and a first end thereof is connected to a corresponding second data line. In a same column of sub-pixels, an extension direction of a first line connecting a second end of a first connection portion and a second end of a second connection portion is substantially parallel to a second direction.

Abstract: A pixel circuit and a driving method therefor, an array substrate and a display device are provided. The pixel circuit includes a driving circuit, a data writing circuit, a first initialization circuit. The driving circuit is configured to control a driving current; the data writing circuit is configured to write a data signal into the control terminal of the driving circuit; the first initialization circuit is configured to apply a first initialization voltage to the control terminal of the driving circuit, and includes a first transistor; the data writing circuit includes a second transistor and the driving circuit includes a third transistor; semiconductor materials of active layers of both the first transistor and the second transistor have a smaller leakage current characteristic than a semiconductor material of a third active layer of the third transistor.

Abstract: The display panel includes a plurality of rows and a plurality of columns of pixel circuits, a plurality of rows of gate lines, a plurality rows of reset control lines, and a plurality of columns of data lines, a same row of pixel circuits corresponds to two rows of gate lines, and one/the other row of gate line is electrically connected to odd/even-numbered columns of pixel circuits in the row of pixel circuits, and provides a corresponding gate driving signal for the odd/even-numbered columns of pixel circuits; a same column of pixel circuits corresponds to two columns of data lines, and one/the other column of data line of the two columns of data lines is electrically connected to odd/even-numbered rows of pixel circuits, and provides a corresponding data voltage for the odd/even-numbered rows of pixel circuits.

Abstract: Disclosed are a display panel and a display device. The display panel includes: a pixel unit, including a pixel circuit and a light-emitting element, the pixel circuit includes a driving transistor and a threshold compensation transistor; a first power line configured to supply a first power supply voltage to the pixel circuit; a blocker, electrically connected with the first power line; and a first conductive structure, connected with the gate electrode of the driving transistor, the first channel and the second channel of the threshold compensation transistor are connected by a conductive connection portion; an area of an orthographic projection of a portion of the blocker overlapping with the first conductive structure on the base substrate is larger than an area of an orthographic projection of a portion of the blocker overlapping with the conductive connection portion on the base substrate.

Abstract: An array substrate is provided. The array substrate includes a plurality of subpixels arranged in an array comprising M rows and N columns. The array substrate includes a respective first subpixel in a (2n?1)-th column and in a (2m?1)-th row; a respective second subpixel in a (2n?1)-th column and in a (2m)-th row; a respective third subpixel in a (2n)-th column and in a (2m)-th row; and a respective fourth subpixel in a (2n)-th column and in a (2m?1)-th row.

Abstract: Disclosed are a display substrate and a manufacturing method thereof, and a display apparatus. The display substrate includes, in a plane parallel to the display substrate, a plurality of gate lines, a plurality of data lines, a plurality of power lines and a plurality of sub-pixels arranged on a base substrate. At least one sub-pixel includes a light-emitting device and a driving circuit configured to drive the light-emitting device to emit light. The driving circuit includes a plurality of transistors and a storage capacitor. The display substrate includes, in a plane perpendicular to the display substrate, a base substrate and a plurality of functional layers. The plurality of functional layers includes a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer and a fourth conductive layer which are sequentially arranged.

Abstract: A method for rapid identification of Huso dauricus and its hybrids provides a DNA molecule of SEQ ID NO: 1 and application of the DNA molecule or more than 10 consecutive nucleotides therein or more than 3 consecutive nucleotides at a terminal thereof as a sturgeon germplasm molecular marker for identifying a sturgeon germplasm of interest, which is Huso dauricus or hybrids of Huso dauricus and other sturgeons. 50 bp InDel mutation region unique to Huso dauricus is screened out. Based on the specific insert fragment, a dominant/co-dominant germplasm-specific molecular marker is developed for identifying Huso dauricus and its hybrids. The dominant molecular marker Hdau216p is used to identify Huso dauricus and hybrids of Huso dauricus blood. According to length specificity of PCR amplification products of Huso dauricus and other sturgeons, co-dominant molecular marker Hdau195l is used to quickly identify purebreds of Huso dauricus and corresponding hybrids by PCR.

Abstract: A display panel and a display device are provided. The display panel includes a pixel unit, a data line, and a connection element, the connection element includes a shielding portion, the shielding portion and the data line extend in the same direction; the pixel circuit includes a driving transistor and a first transistor, a first electrode of the first transistor is connected with the data line, a first electrode of the driving transistor is connected with a second electrode of the first transistor, the display panel further includes a semiconductor pattern and a fourth conductive pattern layer, the fourth conductive pattern layer is located on a side of the semiconductor pattern away from a base substrate, the data line and the shielding portion are located in the fourth conductive pattern, the data line includes two adjacent data lines, the shielding portion is located between the two adjacent data lines.

Abstract: The display panel includes a plurality of rows and a plurality of columns of pixel circuits, a plurality of rows of gate lines, a plurality rows of reset control lines, and a plurality of columns of data lines, a same row of pixel circuits corresponds to two rows of gate lines, and one/the other row of gate line is electrically connected to odd/even-numbered columns of pixel circuits in the row of pixel circuits, and provides a corresponding gate driving signal for the odd/even-numbered columns of pixel circuits; a same column of pixel circuits corresponds to two columns of data lines, and one/the other column of data line of the two columns of data lines is electrically connected to odd/even-numbered rows of pixel circuits, and provides a corresponding data voltage for the odd/even-numbered rows of pixel circuits.

Abstract: A display panel includes a sub-pixel array, gate lines, first data lines, second data lines, a pixel control circuit and a time-division multiplexing circuit. The sub-pixel array includes a plurality of sub-pixels arranged in rows and columns. Sub-pixels in a same row are coupled to the pixel control circuit through at least one gate line. Sub-pixels located in odd-numbered rows in sub-pixels in a same column are coupled to a first data line, and sub-pixels located in even-numbered rows in the sub-pixels in the same column are coupled to a second data line. The time-division multiplexing circuit is coupled to the plurality of first data lines, the plurality of second data lines, and a data signal terminal. The time-division multiplexing circuit is configured to electrically connect the data signal terminal to the first data lines and the second data lines in a time-division manner.

Abstract: Disclosed are a display panel and a display device. The display panel includes: a pixel unit, including a pixel circuit and a light-emitting element, the pixel circuit includes a driving transistor and a threshold compensation transistor; a first power line configured to supply a first power supply voltage to the pixel circuit; a blocker, electrically connected with the first power line; and a first conductive structure, connected with the gate electrode of the driving transistor, the first channel and the second channel of the threshold compensation transistor are connected by a conductive connection portion; an area of an orthographic projection of a portion of the blocker overlapping with the first conductive structure on the base substrate is larger than an area of an orthographic projection of a portion of the blocker overlapping with the conductive connection portion on the base substrate.

Abstract: Provided are a display panel, a drive method thereof and a display apparatus. The display panel includes M*N display units disposed in an array defined by intersections of (M+1) gate lines and N pairs of data lines, and each pair of data lines include a first data line and a second data line; in an mth display row, display units of odd display columns are connected to an mth gate line, and display units of even display columns are connected to an (m+1)th gate line; in an nth display column, display units of odd display rows are connected to first data lines of an nth pair of data lines, and display units of even display rows are connected to second data lines of the nth pair of data lines.

Abstract: A pixel circuitry, a method for driving the pixel circuitry, and a display device are provided. The pixel circuitry includes a driving circuit, a first switching circuit, a second switching circuit and a light-emitting element. The driving circuit includes a first transistor and a storage capacitor. A control end of the first transistor is electrically connected to the first switching circuit, a first end of the first transistor is electrically connected to a first voltage end, a second end of the first transistor is electrically connected to an anode of the light-emitting element, a third end of the first transistor is electrically connected to the second switching circuit, a first end of the storage capacitor is electrically connected to the first voltage end, and a second end of the storage capacitor is electrically connected to the control end of the first transistor.

Abstract: A pixel circuit and a driving method therefor, an array substrate and a display device are provided. The pixel circuit includes a driving circuit, a data writing circuit, a first initialization circuit. The driving circuit is configured to control a driving current; the data writing circuit is configured to write a data signal into the control terminal of the driving circuit; the first initialization circuit is configured to apply a first initialization voltage to the control terminal of the driving circuit, and includes a first transistor; the data writing circuit includes a second transistor and the driving circuit includes a third transistor; semiconductor materials of active layers of both the first transistor and the second transistor have a smaller leakage current characteristic than a semiconductor material of a third active layer of the third transistor.

Abstract: A display panel and a display device are provided. The display panel includes: a pixel unit including a pixel circuit and a light-emitting element, the pixel circuit including a first transistor, the pixel unit including a first pixel unit and a second pixel unit located in a same row and adjacent columns; a first gate line and a second gate line, connected to gate electrodes of the first transistors of the first pixel unit and the second pixel unit; a first gate signal line, connected to the first pixel unit; a second gate signal line, connected to the second pixel unit; a first connection line connected with the first gate signal line through the first connection line; and a second connection line connected with the second gate signal line through the second connection line.

Abstract: Provided are a gate driving circuit, a display substrate, a display device and a gate driving method, the gate driving circuit includes: a frequency doubling control circuit and an effective output circuit including first shift registers, the first shift register at the first stage has a first signal input terminal coupled with an output control signal line and a second signal input terminal coupled with the frequency doubling control circuit; the frequency doubling control circuit is coupled to the output control signal line, for providing a frequency doubling control signal thereto after a preset time period from the receipt of the output control signal in response to an output control signal from the output control signal line; the first shift register at the first stage outputs a scanning signal in response to the output control signal and a scanning signal in response to the frequency doubling control signal.

Abstract: A pixel driving circuit includes: an energy storage sub-circuit, a reset sub-circuit, a compensation sub-circuit, a driving sub-circuit, and a current leakage suppression sub-circuit. The energy storage sub-circuit is coupled to a first node and a second node. The reset sub-circuit is coupled to the second node, a first scan timing signal terminal, and an initialization signal terminal. The compensation sub-circuit is coupled to the second node, a third node, and a second scan timing signal terminal. The driving sub-circuit is coupled to the second node, the third node, and a first voltage signal terminal. The current leakage suppression sub-circuit is coupled to the energy storage sub-circuit, the reset sub-circuit, and the compensation sub-circuit. The current leakage suppression sub-circuit is configured to suppress current leakage of the energy storage sub-circuit in a process of generating and transmitting the driving signal by the driving sub-circuit.

Abstract: Disclosed are a display panel and a display device. The display panel includes a base substrate; a pixel unit on the base substrate and including a pixel circuit and a light-emitting element, the pixel circuit being configured to drive the light-emitting element, the pixel circuit being closer to the base substrate than the light-emitting element and including a driving transistor; a data line configured to provide data signal to the pixel circuit; a connection element through which the light-emitting element is connected with the pixel circuit, the connection element including a shielding portion; and a connection line connected with a gate electrode of the driving transistor. The data line includes two adjacent data lines with the shielding portion located therebetween, and an orthographic projection of the connection line on the base substrate at least partially overlaps with an orthographic projection of the shielding portion on the base substrate.

Abstract: A display panel and a driving method thereof and a display device are provided. The display panel includes a pixel circuit and a light-emitting element, the pixel circuit including a driving transistor, a first reset transistor and a second reset transistor; the first reset transistor configured to reset the gate electrode of the driving transistor, and the second reset transistor configured to reset the first electrode of the light-emitting element; a first initialization signal line connected with the gate electrode of the driving transistor through the first reset transistor; and a first power line. The first reset transistor is a dual-gate transistor and includes a first channel and a second channel which are connected by a first conductive connection portion; an orthographic projection of the first conductive connection portion on the base substrate is completely within an orthographic projection of the first power line on the base substrate.