Abstract: Various embodiments are generally directed to virtualized systems. A first guest memory page may be identified based at least in part on a number of accesses to a page table entry for the first guest memory page in a page table by an application executing in a virtual machine (VM) on the processor, the first guest memory page corresponding to a first byte-addressable memory. The execution of the VM and the application on the processor may be paused. The first guest memory page may be migrated to a target memory page in a second byte-addressable memory, the target memory page comprising one of a target host memory page and a target guest memory page, the second byte-addressable memory having an access speed faster than an access speed of the first byte-addressable memory.

Abstract: A pixel circuitry, a method for driving the pixel circuitry, and a display device are provided. The pixel circuitry includes a driving circuit, a first switching circuit, a second switching circuit and a light-emitting element. The driving circuit includes a first transistor and a storage capacitor. A control end of the first transistor is electrically connected to the first switching circuit, a first end of the first transistor is electrically connected to a first voltage end, a second end of the first transistor is electrically connected to an anode of the light-emitting element, a third end of the first transistor is electrically connected to the second switching circuit, a first end of the storage capacitor is electrically connected to the first voltage end, and a second end of the storage capacitor is electrically connected to the control end of the first transistor.

Abstract: A disclosed example includes accessing, by a backend block service driver in an input/output virtual machine executing on one or more processors, a first command submitted to a buffer by a paravirtualized input/output frontend block driver executing in a guest virtual machine; generating, by the backend block service driver, a translated command based on the first command by translating a virtual parameter of the first command to a physical parameter associated with a physical resource; submitting, by the backend block service driver, the translated command to an input/output queue to be processed by the physical resource based on the physical parameter; and submitting, by the backend block service driver, a completion status entry to the buffer, the completion status entry indicative of completion of a direct memory access operation that copies data between the physical resource and a guest memory buffer corresponding to the guest virtual machine.

Abstract: A pixel circuit and a driving method therefor, an array substrate and a display device are provided. The pixel circuit includes a driving circuit, a data writing circuit, a first initialization circuit. The driving circuit is configured to control a driving current; the data writing circuit is configured to write a data signal into the control terminal of the driving circuit; the first initialization circuit is configured to apply a first initialization voltage to the control terminal of the driving circuit, and includes a first transistor; the data writing circuit includes a second transistor and the driving circuit includes a third transistor; semiconductor materials of active layers of both the first transistor and the second transistor have a smaller leakage current characteristic than a semiconductor material of a third active layer of the third transistor.

Abstract: A display panel and a display device are provided. The display panel includes: a pixel unit including a pixel circuit and a light-emitting element, the pixel circuit including a first transistor, the pixel unit including a first pixel unit and a second pixel unit located in a same row and adjacent columns; a first gate line and a second gate line, connected to gate electrodes of the first transistors of the first pixel unit and the second pixel unit; a first gate signal line, connected to the first pixel unit; a second gate signal line, connected to the second pixel unit; a first connection line connected with the first gate signal line through the first connection line; and a second connection line connected with the second gate signal line through the second connection line.

Abstract: Various embodiments are generally directed to virtualized systems. A first guest memory page may be identified based at least in part on a number of accesses to a page table entry for the first guest memory page in a page table by an application executing in a virtual machine (VM) on the processor, the first guest memory page corresponding to a first byte-addressable memory. The execution of the VM and the application on the processor may be paused. The first guest memory page may be migrated to a target memory page in a second byte-addressable memory, the target memory page comprising one of a target host memory page and a target guest memory page, the second byte-addressable memory having an access speed faster than an access speed of the first byte-addressable memory.

Abstract: A pixel driving circuit includes: an energy storage sub-circuit, a reset sub-circuit, a compensation sub-circuit, a driving sub-circuit, and a current leakage suppression sub-circuit. The energy storage sub-circuit is coupled to a first node and a second node. The reset sub-circuit is coupled to the second node, a first scan timing signal terminal, and an initialization signal terminal. The compensation sub-circuit is coupled to the second node, a third node, and a second scan timing signal terminal. The driving sub-circuit is coupled to the second node, the third node, and a first voltage signal terminal. The current leakage suppression sub-circuit is coupled to the energy storage sub-circuit, the reset sub-circuit, and the compensation sub-circuit. The current leakage suppression sub-circuit is configured to suppress current leakage of the energy storage sub-circuit in a process of generating and transmitting the driving signal by the driving sub-circuit.

Abstract: Provided are a gate driving circuit, a display substrate, a display device and a gate driving method, the gate driving circuit includes: a frequency doubling control circuit and an effective output circuit including first shift registers, the first shift register at the first stage has a first signal input terminal coupled with an output control signal line and a second signal input terminal coupled with the frequency doubling control circuit; the frequency doubling control circuit is coupled to the output control signal line, for providing a frequency doubling control signal thereto after a preset time period from the receipt of the output control signal in response to an output control signal from the output control signal line; the first shift register at the first stage outputs a scanning signal in response to the output control signal and a scanning signal in response to the frequency doubling control signal.

Abstract: Disclosed are a display panel and a display device. The display panel includes a base substrate; a pixel unit on the base substrate and including a pixel circuit and a light-emitting element, the pixel circuit being configured to drive the light-emitting element, the pixel circuit being closer to the base substrate than the light-emitting element and including a driving transistor; a data line configured to provide data signal to the pixel circuit; a connection element through which the light-emitting element is connected with the pixel circuit, the connection element including a shielding portion; and a connection line connected with a gate electrode of the driving transistor. The data line includes two adjacent data lines with the shielding portion located therebetween, and an orthographic projection of the connection line on the base substrate at least partially overlaps with an orthographic projection of the shielding portion on the base substrate.

Abstract: A display panel and a driving method thereof and a display device are provided. The display panel includes a pixel circuit and a light-emitting element, the pixel circuit including a driving transistor, a first reset transistor and a second reset transistor; the first reset transistor configured to reset the gate electrode of the driving transistor, and the second reset transistor configured to reset the first electrode of the light-emitting element; a first initialization signal line connected with the gate electrode of the driving transistor through the first reset transistor; and a first power line. The first reset transistor is a dual-gate transistor and includes a first channel and a second channel which are connected by a first conductive connection portion; an orthographic projection of the first conductive connection portion on the base substrate is completely within an orthographic projection of the first power line on the base substrate.

Abstract: A driving method and device for a shift register. In a data refreshing phase, loading an input signal having a pulse level to an input signal end, loading a control clock pulse signal to a control clock signal end, loading a noise reduction clock pulse signal to a noise reduction clock signal end, controlling a cascade signal end of the shift register to output a cascade signal having a pulse level, and controlling a drive signal end of the shift register to output a drive signal having a pulse level; in a data holding phase, loading a fixed voltage signal to the input signal end, loading a first set signal to the control clock signal end, loading a second set signal to the noise reduction clock signal end, controlling the cascade signal end to output a fixed voltage signal having a second level.

Abstract: Provided are a pixel circuitry, a control method thereof and a display device. The pixel circuitry includes: a plurality of sub-pixels arranged in an array; a plurality of gate lines extending in a first direction, where all sub-pixels located in one row are electrically coupled to one gate line; a plurality of first signal lines and a plurality of second signal lines extending in a second direction, where all sub-pixels located in odd-numbered rows and one column are electrically coupled to one first signal line, and all sub-pixels located in even-numbered rows and one column are electrically coupled to one second signal line, the second direction being perpendicular to the first direction; and a plurality of data lines extending in the second direction, where two first signal lines and two second signal lines coupled to two adjacent columns of sub-pixels are electrically coupled to one data line.

Abstract: A drive circuit, a drive method, a display panel, and a display device. The drive circuit includes: a drive transistor (M0), a first pole of the drive transistor (M0) being electrically connected to a first power supply end (ELVDD), a second pole of the drive transistor (M0) being electrically connected to an element to be driven (L); a first control circuit (1), a first end of the first control circuit (1) being electri-cally connected to a data detection end, a control end of the first control circuit (1) being electrically connected to a control signal end (CS); a stabilizing capacitor (CLC), a first pole of the stabilizing capacitor (CLC) being electrically connected to a second end of the first control circuit (1), the second pole of the stabilizing capacitor (CLC) being electrically connected to the first power supply end (ELVDD): a second control circuit (2).

Abstract: A display panel and a driving method thereof and a display device are provided. The display panel includes a pixel circuit and a light-emitting element, the pixel circuit including a driving transistor, a first reset transistor and a second reset transistor; the first reset transistor being connected with a gate electrode of the driving transistor and configured to reset the gate electrode of the driving transistor, and the second reset transistor being configured to reset the first electrode of the light-emitting element; a first initialization signal line, connected with the gate electrode of the driving transistor through the first reset transistor; and a second initialization signal line, connected with the first electrode of the light-emitting element through the second reset transistor. The first initialization signal line and the second initialization signal line are insulated from each other and are configured to supply signals respectively.

Abstract: The present disclosure provides a signal generation circuit, a signal generation method, a signal generation module and a display device. The signal generating circuit includes an input terminal, a signal output terminal, a transmission control circuit, a first output circuit, and an output control circuit; the output control circuit is electrically connected to a first output control terminal, a second output control terminal, a second voltage terminal, the signal writing-in terminal, the signal output terminal and the first voltage terminal, configured to control to connect the signal writing-in terminal and the second voltage terminal under the control of a second output control signal provided by the second output control terminal, and control to connect the signal output terminal and the first voltage terminal under the control of a first output control signal provided by the first output control terminal. The present disclosure expands an adjustment range of frequency of a PWM signal.

Abstract: A signal control apparatus and method, a display control apparatus and method, and a display apparatus are provided. The display apparatus includes M rows by N columns of pixel driving circuits arranged in an array, the M pixel driving circuits of each column are grouped into at least a first group of pixel driving circuits and a second group of pixel driving circuits, M and N are integer and N is larger than 2. The first group of pixel driving circuits connect to a first data line to receive a data signal, and the second group of pixel driving circuits connect to a second data line to receive a data signal. The signal control apparatus includes a phase shifting circuit which provides a scanning signal to a pixel driving circuit; and a write control circuit which provides a data signal from a data signal terminal to a pixel driving circuit.

Abstract: The present disclosure provides a pixel driving circuit, a method of driving the same, and a display device. In the pixel driving circuit, under the control of a gate line, a data writing-in sub-circuit controls to connect or disconnect a data line and a first common node, and controls to connect or disconnect the first common node and a gate electrode of the driving transistor; under the control of a reset signal line, a first reset control sub-circuit controls to connect or disconnect a reference voltage input terminal and a second common node, and controls to connect or disconnect the second common node and the gate electrode of the driving transistor; a first end of a third capacitor unit is connected to the first common node and/or the second common node, and a second end of the third capacitor unit is connected to the first electrode of the driving transistor.

Abstract: Disclosed are a display panel and a display device. The display panel includes: a pixel unit, including a pixel circuit and a light-emitting element, the pixel circuit includes a driving transistor and a threshold compensation transistor; a first power line configured to supply a first power supply voltage to the pixel circuit; a blocker, electrically connected with the first power line; and a first conductive structure, connected with the gate electrode of the driving transistor, the first channel and the second channel of the threshold compensation transistor are connected by a conductive connection portion; an area of an orthographic projection of a portion of the blocker overlapping with the first conductive structure on the base substrate is larger than an area of an orthographic projection of a portion of the blocker overlapping with the conductive connection portion on the base substrate.

Abstract: A driving method and device for a shift register. In a data refreshing phase, loading an input signal having a pulse level to an input signal end, loading a control clock pulse signal to a control clock signal end, loading a noise reduction clock pulse signal to a noise reduction clock signal end, controlling a cascade signal end of the shift register to output a cascade signal having a pulse level, and controlling a drive signal end of the shift register to output a drive signal having a pulse level; in a data holding phase, loading a fixed voltage signal to the input signal end, loading a first set signal to the control clock signal end, loading a second set signal to the noise reduction clock signal end, controlling the cascade signal end to output a fixed voltage signal having a second level.

Abstract: A pixel circuitry, a method for driving the pixel circuitry, and a display device are provided. The pixel circuitry includes a driving circuit, a first switching circuit, a second switching circuit and a light-emitting element. The driving circuit includes a first transistor and a storage capacitor. A control end of the first transistor is electrically connected to the first switching circuit, a first end of the first transistor is electrically connected to a first voltage end, a second end of the first transistor is electrically connected to an anode of the light-emitting element, a third end of the first transistor is electrically connected to the second switching circuit, a first end of the storage capacitor is electrically connected to the first voltage end, and a second end of the storage capacitor is electrically connected to the control end of the first transistor.