Patents by Inventor Tian-Shuan Luo

Tian-Shuan Luo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Process for fabricating memory device
    Patent number: 8338250
    Abstract: A memory device is described, including a substrate, data storage structures over the substrate, control gates over the data storage structures, and a dielectric layer between the data storage structures and the control gates, wherein each data storage structure includes a lower part and an upper part narrower than the lower part. A process for fabricating the memory device is also described, wherein formation of the data storage structures includes recessing portions of a data storage layer to form respective upper parts of the data storage structures and then dividing the recessed portions of the data storage layer to form respective lower parts of the data storage structures.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: December 25, 2012
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Chu-Ming Ma, Tian-Shuan Luo
  • Method of manufacturing a memory device
    Patent number: 8129242
    Abstract: A method of manufacturing a flash memory device having an enhanced gate coupling ratio includes steps of forming a first semiconductor layer on a substrate and forming a semiconductor spacer layer on top of the first semiconductor layer. The semiconductor spacer layer includes a plurality of recesses. The method provides a semiconductor spacer structure which functions to increase the contact area between a floating gate and a control gate of the flash memory device.
    Type: Grant
    Filed: May 12, 2006
    Date of Patent: March 6, 2012
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Tian-Shuan Luo, Chun-Pei Wu
  • DATA STORAGE STRUCTURE, MEMORY DEVICE AND PROCESS FOR FABRICATING MEMORY DEVICE
    Publication number: 20100176434
    Abstract: A memory device is described, including a substrate, data storage structures over the substrate, control gates over the data storage structures, and a dielectric layer between the data storage structures and the control gates, wherein each data storage structure includes a lower part and an upper part narrower than the lower part. A process for fabricating the memory device is also described, wherein formation of the data storage structures includes recessing portions of a data storage layer to form respective upper parts of the data storage structures and then dividing the recessed portions of the data storage layer to form respective lower parts of the data storage structures.
    Type: Application
    Filed: January 15, 2009
    Publication date: July 15, 2010
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chu-Ming Ma, Tian-Shuan Luo
  • Method of Manufacturing a Flash Memory Device
    Publication number: 20070264774
    Abstract: A method of manufacturing a flash memory device having an enhanced gate coupling ratio includes steps of forming a first semiconductor layer on a substrate and forming a semiconductor spacer layer on top of the first semiconductor layer. The semiconductor spacer layer includes a plurality of recesses. The method provides a semiconductor spacer structure which functions to increase the contact area between a floating gate and a control gate of the flash memory device.
    Type: Application
    Filed: May 12, 2006
    Publication date: November 15, 2007
    Applicant: Macronix International Co., Ltd.
    Inventors: Tian-Shuan Luo, Chun-Pei Wu