Abstract: An apparatus for the fabrication of a semiconductor device comprising: a mold having top and bottom halves, each with cavities for holding semiconductor chips pre-assembled on an electrically insulating interposer; one of said halves having a plurality of runners and a plurality of gates for feeding encapsulation material into said cavities; said plurality of runners comprising pairs of runners parallel to each other, having gates opposite to each other, thereby forming dual gates; each pair of runners being configured such that encapsulation material will exit from adjacent gates concurrently; and each pair of dual gates being structured such that they fill the cavity between them uniformly with encapsulation material, thereby encapsulating thin semiconductor devices.

Abstract: A method of encapsulating a semiconductor device comprising the steps of providing a mold having top and bottom halves each with cavities for holding semiconductor devices, and further having gates and runners for feeding encapsulation material into said cavities; lining said cavities with protective plastic films; providing a plurality of semiconductor integrated circuit chips, each having an outline; providing an electrically insulating interposer; assembling said chip and said interposer, loading said assembly into said mold and introducing into said mold a low-viscosity, high adhesion encapsulation material; at least partially curing said encapsulation material, thereby forming a flat, high-luster surface; opening said mold and removing said interposer together with said encapsulated chips from said mold; attaching an array of solder balls to the exposed surface of said interposer; and singulating said encapsulated semiconductor devices, thereby forming devices having an outline substantially the same as