Abstract: The present invention provides a method for preparing a gallium oxide semiconductor structure and a gallium oxide semiconductor structure obtained thereby.

Abstract: The present disclosure provides a gallium oxide semiconductor structure, a vertical gallium oxide-based power device, and a preparation method. An unintentionally doped gallium oxide layer (110) is transferred to a highly doped and highly thermally conductive heterogeneous substrate (200) by bonding and thinning; then a heavily doped gallium oxide layer (120) is formed on the gallium oxide layer by treating and ion implantation, thereby preparing the gallium oxide semiconductor structure including the heterogeneous substrate (200), the gallium oxide layer (110), and the heavily doped gallium oxide layer (120) stacked in sequence. In the vertical gallium oxide-based power device prepared on the basis of the gallium oxide semiconductor structure, the gallium oxide layer (110) is a thicker intermediate layer and a carrier concentration of the gallium oxide layer (110) is less than that of the heavily doped gallium oxide layer (120).

Abstract: A method for preparing a film bulk acoustic wave device by using a film transfer technology includes: 1) providing an oxide monocrystal substrate; 2) implanting ions from the implantation surface into the oxide monocrystal substrate, and then forming a lower electrode on the implantation surface; or vice versa; and forming a defect layer at the preset depth; 3) providing a support substrate and bonding a structure obtained in step 2) with the support substrate; 4) removing part of the oxide monocrystal substrate along the defect layer so as to obtain an oxide monocrystal film, and transferring the obtained oxide monocrystal film and the lower electrode to the support substrate; 5) etching the support substrate from a bottom of the support substrate to form a cavity; 6) forming an upper electrode on the surface of the oxide monocrystal film.

Abstract: A method for preparing a film bulk acoustic wave device by using a film transfer technology includes: 1) providing an oxide monocrystal substrate; 2) implanting ions from the implantation surface into the oxide monocrystal substrate, and then forming a lower electrode on the implantation surface; or vice versa; and forming a defect layer at the preset depth; 3) providing a support substrate and bonding a structure obtained in step 2) with the support substrate; 4) removing part of the oxide monocrystal substrate along the defect layer so as to obtain an oxide monocrystal film, and transferring the obtained oxide monocrystal film and the lower electrode to the support substrate; 5) etching the support substrate from a bottom of the support substrate to form a cavity; 6) forming an upper electrode on the surface of the oxide monocrystal film.

Abstract: The present invention provides a method for preparing a gallium oxide semiconductor structure and a gallium oxide semiconductor structure obtained thereby.

Abstract: The present disclosure provides a method for preparing heterostructure, which includes providing a donor substrate and forming a sacrificial layer on a surface of the donor substrate; forming a thin film cover layer on a surface of the sacrificial layer, wherein a top surface of the thin film cover layer is an implantation surface; performing ion implantation from the implantation surface, such that a defect layer is formed in the sacrificial layer; providing an acceptor substrate, and bonding the acceptor substrate to the implantation surface of the thin film cover layer; removing the sacrificial layer along the defect layer. The method for preparing the heterostructure of the present disclosure can successfully transfer the thin film cover layer to the acceptor substrate. The present disclosure can provide a compliant substrate, while the semiconductor donor substrate material can be reused, therefore is energy-efficient and environmental-friendly.

Abstract: Disclosed is a complementary resistor switch (3) comprising two outer contacts, between which two piezo- or ferroelectric layers (11a and 11b) having an inner common contact are situated. At least one region (11?, 11?) of the layers is modified, either the outer contacts are rectifying (S) and the inner contact is non-rectifying (0), or vice versa, the modified regions are formed at the rectifying contacts, the layers have different strain-dependent structural phases with different band gaps and/or different polarization charges, and the electrical conductivity of the layers is different. Also disclosed are a connectable resistor structure having at least one Schottky contact at two adjoining piezo- or ferroelectric layers, a polycrystalline piezo- or ferroelectric layer comprising modified crystallites, and a method and circuits for encrypting and decrypting a bit sequence.

Abstract: Disclosed is a complementary resistor switch (3) comprising two outer contacts, between which two piezo- or ferroelectric layers (11a and 11b) having an inner common contact are situated. At least one region (11?, 11?) of the layers is modified, either the outer contacts are rectifying (S) and the inner contact is non-rectifying (O), or vice versa, the modified regions are formed at the rectifying contacts, the layers have different strain-dependent structural phases with different band gaps and/or different polarization charges, and the electrical conductivity of the layers is different. Also disclosed are a connectable resistor structure having at least one Schottky contact at two adjoining piezo- or ferroelectric layers, a polycrystalline piezo- or ferroelectric layer comprising modified crystallites, and a method and circuits for encrypting and decrypting a bit sequence.

Abstract: Disclosed is a complementary resistor switch (3) comprising two outer contacts, between which two piezo- or ferroelectric layers (11a and 11b) having an inner common contact are situated. At least one region (11?, 11?) of the layers is modified, either the outer contacts are rectifying (S) and the inner contact is non-rectifying (0), or vice versa, the modified regions are formed at the rectifying contacts, the layers have different strain-dependent structural phases with different band gaps and/or different polarization charges, and the electrical conductivity of the layers is different. Also disclosed are a connectable resistor structure having at least one Schottky contact at two adjoining piezo- or ferroelectric layers, a polycrystalline piezo- or ferroelectric layer comprising modified crystallites, and a method and circuits for encrypting and decrypting a bit sequence.

Abstract: Disclosed is a complementary resistor switch (3) comprising two outer contacts, between which two piezo- or ferroelectric layers (11a and 11b) having an inner common contact are situated. At least one region (11?, 11?) of the layers is modified, either the outer contacts are rectifying (S) and the inner contact is non-rectifying (0), or vice versa, the modified regions are formed at the rectifying contacts, the layers have different strain-dependent structural phases with different band gaps and/or different polarization charges, and the electrical conductivity of the layers is different. Also disclosed are a connectable resistor structure having at least one Schottky contact at two adjoining piezo- or ferroelectric layers, a polycrystalline piezo- or ferroelectric layer comprising modified crystallites, and a method and circuits for encrypting and decrypting a bit sequence.