Patents by Inventor Tianmin Zhou

Tianmin Zhou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12336227
    Abstract: A thin film transistor includes a gate electrode, an active layer, a gate insulating layer located between the gate electrode and the active layer, and a source electrode and a drain electrode electrically connected to the active layer. The active layer includes a channel layer and at least one channel protection layer; a material of each of the channel layer and the at least one channel protection layer is a metal oxide semiconductor material. The at least one channel protection layer is a crystallizing layer, and metal elements of the at least one channel protection layer include non-rare earth metal elements including In, Ga, Zn and Sn.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: June 17, 2025
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Jie Huang, Zhengliang Li, Ce Ning, Hehe Hu, Nianqi Yao, Kun Zhao, Fengjuan Liu, Tianmin Zhou, Liping Lei
  • Publication number: 20250194254
    Abstract: The present disclosure provides a display substrate, a display panel and a display apparatus. The display substrate includes a base substrate; a transistor, located on the base substrate, and including an active layer; and a data line, located between the active layer and the base substrate; the data line is connected with the active layer, and an orthographic projection of the active layer on the base substrate is located in an orthographic projection of the data line on the base substrate.
    Type: Application
    Filed: February 24, 2025
    Publication date: June 12, 2025
    Inventors: Lizhong WANG, Jin YANG, Tianmin ZHOU, Hui GUO
  • Publication number: 20250164843
    Abstract: A displaying base plate and a displaying device are provided by the present application, wherein the displaying base plate includes a substrate, and a first electrode layer disposed on one side of the substrate, wherein the first electrode layer includes a first electrode pattern; a first planarization layer disposed on one side of the first electrode layer that is away from the substrate, wherein the first planarization layer is provided with a through hole, and the through hole penetrates the first planarization layer, to expose the first electrode pattern; and a second electrode layer, a second planarization layer and a third electrode layer that are disposed in stack on one side of the first planarization layer that is away from the substrate.
    Type: Application
    Filed: January 17, 2025
    Publication date: May 22, 2025
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Zhen Zhang, Fuqiang Li, Zhenyu Zhang, Yunping Di, Lizhong Wang, Zheng Fang, Jiahui Han, Yawei Wang, Chenyang Zhang, Chengfu Xu, Ce Ning, Pengxia Liang, Feihu Zhou, Xianqin Meng, Weiting Peng, Qiuli Wang, Binbin Tong, Rui Huang, Tianmin Zhou, Wei Yang
  • Publication number: 20250159931
    Abstract: The present disclosure provides a thin film transistor, a GOA circuit and an array substrate, the thin film transistor comprising: a source electrode, including a source electrode wiring and a plurality of source electrode branches; a drain electrode, including a drain electrode wiring and a plurality of drain electrode branches; a gate; a semiconductor layer comprising a plurality of semiconductor branches; a plurality of source electrode branches, wherein the plurality of drain electrode branches are in contact with the plurality of semiconductor branches and are divided into a plurality of cells; the source electrode wiring and the drain electrode wiring are arranged in a parallel and spaced apart, and the number m of one of the source electrode wiring and the drain electrode wiring is an integer greater than or equal to 2, and the number n of the other is an integer greater than or equal to 1.
    Type: Application
    Filed: January 16, 2025
    Publication date: May 15, 2025
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Lizhong Wang, Ce Ning, Hehe Hu, Tianmin Zhou, Jipeng Song
  • Publication number: 20250123520
    Abstract: Provided is a display substrate. The display substrate includes: a substrate body; and a plurality of support pillars disposed on the substrate body, wherein the support pillar includes a first surface in contact with the substrate body, and a second surface opposite to the first surface; wherein in any direction parallel to the substrate body, a ratio of a width of the first surface to a width of the second surface is greater than or equal to 0.8, and is less than or equal to 1.2.
    Type: Application
    Filed: June 30, 2022
    Publication date: April 17, 2025
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Wenqu LIU, Feng ZHANG, Qi YAO, Yong YU, Detian MENG, Zhao CUI, Zhijun LV, Yang YUE, Yuqiao LI, Dongfei HOU, Liwen DONG, Tianmin ZHOU
  • Publication number: 20250120298
    Abstract: The present disclosure relates to an OLED display panel and display device. The OLED display panel includes: a display area, a bending area and a bonding area, the display panel further includes: a base substrate; a first semiconductor pattern on the base substrate; a first insulating layer group on the first semiconductor pattern; a second semiconductor pattern on the first insulating layer group; a second insulating layer group on the second semiconductor pattern; first via holes in the first insulating layer group and the second insulating layer group; second via holes in the second insulating layer group, the display panel further includes: a metal trace, located on a side of the second insulating layer group away from the base substrate, and configured to connect a trace in the display area to a circuit board of the bending area; and a second source electrode and/or a second drain electrode.
    Type: Application
    Filed: December 18, 2024
    Publication date: April 10, 2025
    Inventors: Wei YANG, Guangcai Yuan, Ce Ning, Xinhong Lu, Tianmin Zhou, Xin Yang
  • Patent number: 12268063
    Abstract: A displaying substrate and a displaying device. The displaying substrate comprises a flexible base plate; a first auxiliary electrode arranged on one side of the flexible base plate, the first auxiliary electrode being connected with a first power cord; a pixel unit arranged on a side of the flexible base plate away from a first metal layer, the pixel unit comprising: thin-film transistors arranged on the side of the flexible base plate away from the first metal layer, an insulation layer and a second auxiliary electrode, the second auxiliary electrode being connected with a second power cord, wherein the plurality of thin-film transistors comprise a drive transistor, the drive transistor has a source connected with the first auxiliary electrode and a drain connected with a first electrode of a light emitting device, a second electrode of the light emitting device is connected with the second auxiliary electrode.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: April 1, 2025
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Fengjuan Liu, Ke Wang, Wei Liu, Tianmin Zhou
  • Publication number: 20250098212
    Abstract: The present disclosure relates to the field of display technologies, and in particular to a thin film transistor and a method for manufacturing the same, an array substrate and a display device. An active layer of the thin film transistor includes at least two metal oxide semi-conductor layers, the at least two metal oxide semi-conductor layers include a channel layer and a first protection layer, and metals in the channel layer include at least one of indium, gallium and zinc. Praseodymium is doped into the channel layer. And, in the channel layer, a number density of praseodymium atoms in the channel layer gradually decreases with a distance from the first protection layer.
    Type: Application
    Filed: November 28, 2024
    Publication date: March 20, 2025
    Inventors: Jie HUANG, Jiayu HE, Ce NING, Zhengliang LI, Hehe HU, Fengjuan LIU, Nianqi YAO, Kun ZHAO, Tianmin ZHOU, Jiushi WANG, Zhongpeng TIAN
  • Publication number: 20250098225
    Abstract: An oxide thin film transistor includes: a gate electrode, a metal oxide active layer and a source-drain metal layer, which are on a base substrate. The metal oxide active layer includes a first metal oxide layer and a second metal oxide layer stacked on the first metal oxide layer in a direction away from the base substrate; the first metal oxide layer is a carrier transport layer; the second metal oxide layer is a carrier isolation layer; an electron transfer rate of the carrier transport layer is greater than an electron transfer rate of the carrier isolation layer. The first metal oxide layer includes a primary surface facing toward the base substrate and a primary surface away from the base substrate; the first metal oxide layer further includes a lateral surface around the primary surfaces; the second metal oxide layer covers the lateral surface of the first metal oxide layer.
    Type: Application
    Filed: November 26, 2024
    Publication date: March 20, 2025
    Inventors: Lizhong WANG, Tianmin ZHOU, Hehe HU, Xiaochun XU, Nianqi YAO, Dapeng XUE, Shuilang DONG
  • Patent number: 12237340
    Abstract: The present disclosure provides a display substrate, a display panel and a display apparatus. The display substrate includes a base substrate; a transistor, located on the base substrate, and including an active layer; and a data line, located between the active layer and the base substrate; the data line is connected with the active layer, and an orthographic projection of the active layer on the base substrate is located in an orthographic projection of the data line on the base substrate.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: February 25, 2025
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Lizhong Wang, Jin Yang, Tianmin Zhou, Hui Guo
  • Patent number: 12235557
    Abstract: A displaying base plate and a manufacturing method thereof, and a displaying device. The displaying base plate includes a substrate, and a first electrode layer disposed on one side of the substrate, wherein the first electrode layer includes a first electrode pattern; a first planarization layer disposed on one side of the first electrode layer that is away from the substrate, wherein the first planarization layer is provided with a through hole, and the through hole penetrates the first planarization layer, to expose the first electrode pattern; and a second electrode layer, a second planarization layer and a third electrode layer that are disposed in stack on one side of the first planarization layer that is away from the substrate, wherein the second electrode layer is disposed closer to the substrate, the second electrode layer is connected to the first electrode pattern and the third electrode layer.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: February 25, 2025
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhen Zhang, Fuqiang Li, Zhenyu Zhang, Yunping Di, Lizhong Wang, Zheng Fang, Jiahui Han, Yawei Wang, Chenyang Zhang, Chengfu Xu, Ce Ning, Pengxia Liang, Feihu Zhou, Xianqin Meng, Weiting Peng, Qiuli Wang, Binbin Tong, Rui Huang, Tianmin Zhou, Wei Yang
  • Patent number: 12230683
    Abstract: The present disclosure provides a thin film transistor, a GOA circuit and an array substrate, the thin film transistor including a source electrode, including a source electrode wiring and a plurality of source electrode branches; a drain electrode, including a drain electrode wiring and a plurality of drain electrode branches; a gate; a semiconductor layer including a plurality of semiconductor branches; a plurality of source electrode branches. The plurality of drain electrode branches are in contact with the plurality of semiconductor branches and are divided into a plurality of cells; the source electrode wiring and the drain electrode wiring are arranged in a parallel and spaced apart, and the number m of one of the source electrode wiring and the drain electrode wiring is an integer greater than or equal to 2, and the number n of the other is an integer greater than or equal to 1.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: February 18, 2025
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Lizhong Wang, Ce Ning, Hehe Hu, Tianmin Zhou, Jipeng Song
  • Publication number: 20250040247
    Abstract: The present disclosure provides a display substrate, a method for manufacturing the display substrate and a display panel. The display substrate includes: a first semiconductor layer on a base substrate, where an active layer of the first thin film transistor is in the first semiconductor layer, and the active layer of the first thin film transistor at least comprises a channel region and a drain contact region; an interlayer insulation layer on a side of the first semiconductor layer away from the base substrate; and a first conductive layer on a side of the interlayer insulation layer away from the first semiconductor layer, wherein the pixel electrode is located in the first conductive layer, and the pixel electrode in the pixel unit is directly and electrically connected to the drain contact region of the active layer of the first thin film transistor through a through hole.
    Type: Application
    Filed: March 31, 2022
    Publication date: January 30, 2025
    Inventors: Lizhong WANG, Ce NING, Tianmin ZHOU, Jinchao ZHANG, Liping LEI
  • Patent number: 12213372
    Abstract: The present disclosure relates to an OLED display panel and display device. The OLED display panel includes: a display area, a bending area and a bonding area for bonding a circuit board, wherein the display panel further includes: a base substrate; a first semiconductor pattern on the base substrate; a first insulating layer group on the first semiconductor pattern; a second semiconductor pattern on the first insulating layer group; a second insulating layer group on the second semiconductor pattern; first via holes in the first insulating layer group and the second insulating layer group; second via holes in the second insulating layer group, wherein the display panel further includes: a first groove located in the bending area and having a depth substantially identical to that of the first via holes; and a metal trace, connecting a trace in the display area to the circuit board.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: January 28, 2025
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wei Yang, Guangcai Yuan, Ce Ning, Xinhong Lu, Tianmin Zhou, Xin Yang
  • Patent number: 12191400
    Abstract: An oxide thin film transistor includes: a gate electrode, a metal oxide active layer and a source-drain metal layer, which are on a base substrate. The metal oxide active layer includes a first metal oxide layer and a second metal oxide layer stacked on the first metal oxide layer in a direction away from the base substrate; the first metal oxide layer is a carrier transport layer; the second metal oxide layer is a carrier isolation layer; an electron transfer rate of the carrier transport layer is greater than an electron transfer rate of the carrier isolation layer. The first metal oxide layer includes a primary surface facing toward the base substrate and a primary surface away from the base substrate; the first metal oxide layer further includes a lateral surface around the primary surfaces; the second metal oxide layer covers the lateral surface of the first metal oxide layer.
    Type: Grant
    Filed: May 24, 2023
    Date of Patent: January 7, 2025
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lizhong Wang, Tianmin Zhou, Hehe Hu, Xiaochun Xu, Nianqi Yao, Dapeng Xue, Shuilang Dong
  • Patent number: 12183824
    Abstract: The present disclosure relates to the field of display technologies, and in particular to a thin film transistor and a method for manufacturing the same, an array substrate and a display device. An active layer of the thin film transistor includes at least two metal oxide semi-conductor layers, the at least two metal oxide semi-conductor layers include a channel layer and a first protection layer, and metals in the channel layer include tin, and at least one of indium, gallium and zinc. The first protection layer includes praseodymium used to absorb photo-generated electrons from at least one of the channel layer and the first protection layer which is under light irradiation and reduce a photo-generated current caused by the light irradiation.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: December 31, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jie Huang, Jiayu He, Ce Ning, Zhengliang Li, Hehe Hu, Fengjuan Liu, Nianqi Yao, Kun Zhao, Tianmin Zhou, Jiushi Wang, Zhongpeng Tian
  • Publication number: 20240304633
    Abstract: The present invention provides a pixel unit structure, in which a source electrode is connected to a data line in a thin film transistor; the gate electrode is connected to the gate line; the drain electrode is disposed on a side of the gate insulating layer away from the substrate; the metal oxide semiconductor layer is disposed on a side of the gate insulating layer away from the substrate, and includes a semiconductor portion and a first conductive portion and a second conductive portion respectively located on both sides of the semiconductor portion; a terminal of the first conductive portion adjacent to the drain electrode is connected to the drain electrode or serves as at least a portion of the drain electrode; and the second conductive portion is connected to the source electrode through a first via formed correspondingly on the gate insulating layer and the interlayer dielectric layer.
    Type: Application
    Filed: November 30, 2022
    Publication date: September 12, 2024
    Inventors: Binbin TONG, Ce NING, Lizhong WANG, Rui HUANG, Wei YANG, Meng ZHAO, Tianmin ZHOU, Jinchao ZHANG, Hui GUO
  • Publication number: 20240297177
    Abstract: The present disclosure provides a display substrate, a display panel and a display apparatus. The display substrate includes a base substrate; a transistor, located on the base substrate, and including an active layer; and a data line, located between the active layer and the base substrate; the data line is connected with the active layer, and an orthographic projection of the active layer on the base substrate is located in an orthographic projection of the data line on the base substrate.
    Type: Application
    Filed: June 23, 2022
    Publication date: September 5, 2024
    Inventors: Lizhong WANG, Jin YANG, Tianmin ZHOU, Hui GUO
  • Publication number: 20240276767
    Abstract: The present disclosure provides a display substrate, a preparing method therefor, and a display apparatus, the display substrate includes: a base substrate and a driving circuit layer arranged on the base substrate, the driving circuit layer further includes at least one first via hole, the first via hole is located between the second sub-electrode and the first active layer, an orthographic projection of the first via hole is overlapped with an orthographic projection of the first sub-electrode and an orthographic projection of the first active layer on the base substrate respectively, the first via hole exposes at least a portion of the first sub-electrode and at least a portion of the first active layer respectively, the second sub-electrode is electrically connected with the exposed first sub-electrode through the first via hole, and the second sub-electrode is electrically connected with the exposed first active layer through the first via hole.
    Type: Application
    Filed: May 31, 2022
    Publication date: August 15, 2024
    Inventors: Wei YANG, Ce NING, Lizhong WANG, Yunping DI, Tianmin ZHOU, Rui HUANG
  • Publication number: 20240266355
    Abstract: A display substrate and a display device are provided. The display substrate includes: a base substrate, and a low temperature poly-silicon thin film transistor and a metal oxide thin film transistor on the base substrate; the low temperature poly-silicon thin film transistor includes: a low temperature poly-silicon semiconductor layer, a first gate insulating layer, a first gate electrode, a first interlayer insulating layer, a first source electrode, and a first drain electrode; the metal oxide thin film transistor includes: a metal oxide semiconductor layer, a second gate insulating layer, a second gate electrode, a second interlayer insulating layer, a passivation layer, a second source electrode, and a second drain electrode; the second source electrode is on a side of the metal oxide semiconductor layer close to the base substrate; and the second drain electrode is on a side of the metal oxide semiconductor layer away from the base substrate.
    Type: Application
    Filed: March 23, 2022
    Publication date: August 8, 2024
    Inventors: Lizhong WANG, Ce NING, Wei YANG, Tianmin ZHOU, Liping LEI