Patents by Inventor Tianming DAI
Tianming DAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180224983Abstract: A touch film includes a plastic film layer, a touch sensing layer, a linear polarizing film layer, a phase retardation film layer and a barrier layer that are successively laminated. An upper surface of the plastic film layer away from the touch sensing layer has a flexible protective coating. The touch film of the present disclosure is flexible and can adaptively change the surface shape of the product so that the touch film has a wider range of applications. The disclosure further provides an OLED display panel and a method for preparing a touch film.Type: ApplicationFiled: August 5, 2015Publication date: August 9, 2018Applicant: SHENZHEN ROYOLE TECHONOLGIES CO. LTD.Inventors: Jiaqi ZHANG, Tianming DAI, Wenqing XU
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Patent number: 9768306Abstract: An array substrate and a display device are provided. A gate insulating layer and a gate electrode are formed on a semiconductor layer in sequence, the gate insulating layer and the gate electrode are located in a middle position of the semiconductor layer and have a uniform shape and size. In a region on the semiconductor layer that is not covered by the gate insulating layer, there is further provided a metal diffusion layer. A barrier layer includes a portion covering the gate insulating layer and the gate electrode and a portion located around the semiconductor layer. A passivation layer covers the semiconductor layer, the gate insulating layer, the gate electrode and the barrier layer. Source and drain electrodes are connected to the metal diffusion layer respectively, and a pixel electrode contacts with the drain electrode.Type: GrantFiled: May 10, 2016Date of Patent: September 19, 2017Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Tianming Dai, Qi Yao, Feng Zhang, Zhangfeng Cao
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Publication number: 20170243979Abstract: An array substrate and a display device are provided. A gate insulating layer and a gate electrode are formed on a semiconductor layer in sequence, the gate insulating layer and the gate electrode are located in a middle position of the semiconductor layer and have a uniform shape and size. In a region on the semiconductor layer that is not covered by the gate insulating layer, there is further provided a metal diffusion layer. A barrier layer includes a portion covering the gate insulating layer and the gate electrode and a portion located around the semiconductor layer. A passivation layer covers the semiconductor layer, the gate insulating layer, the gate electrode and the barrier layer. Source and drain electrodes are connected to the metal diffusion layer respectively, and a pixel electrode contacts with the drain electrode.Type: ApplicationFiled: May 10, 2016Publication date: August 24, 2017Inventors: Tianming DAI, Oi Yao, Feng Zhang, Zhangeng Cao
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Patent number: 9704884Abstract: An array substrate comprises a substrate, a common electrode formed on the substrate, a light shielding layer disposed on the common electrode, an insulating layer disposed on the light shielding layer and the common electrode, a poly-silicon layer, a gate insulating layer, a gate connected with the common electrode by a hole, a medium layer and a source drain. A method for manufacturing the array substrate comprises forming a transparent conductive layer and a first metallic layer on the substrate, forming patterned common electrode and light shielding layer by multiple steps of etching so that a process of photomask can be saved, and forming holes connecting with the common electrode and the gate by a photomask etching process, then manufacturing a medium layer and a source drain. The method adopts seven processes of photomask so that the process is simplified, and the cost is lowered.Type: GrantFiled: January 21, 2015Date of Patent: July 11, 2017Assignee: Shenzhen China Star Optoelectronics Technology Co., LtdInventor: Tianming Dai
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Patent number: 9646819Abstract: The invention provides a method for forming a surface oxide layer on an amorphous silicon including steps: using a HF acid to clean a surface of the amorphous silicon; using a water to clean the surface of the amorphous silicon being cleaned by the HF acid; drying the surface of the amorphous silicon after being cleaned by the water; using an extreme ultraviolet lithography to form a first oxide layer on the surface of the amorphous silicon after being dried; using an oxidizing solution to clean the surface of the amorphous silicon with the first oxide layer to thereby form a second oxide layer; and drying the surface of the amorphous silicon with the second oxide layer. By using the extreme ultraviolet lithography to form the first oxide layer, the surface of the amorphous silicon is given with strong hydrophilicity and therefore the distribution of water would be uniform.Type: GrantFiled: January 13, 2015Date of Patent: May 9, 2017Assignee: Shenzhen China Star Optoelectronics Technology Co., LtdInventor: Tianming Dai
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Patent number: 9634121Abstract: A method of manufacturing a display panel having a plurality of lightly doped drain thin film transistors arranged as a matrix includes forming a semiconductor pattern with a predetermined shape on a substrate; forming a dielectric layer covering the semiconductor pattern on the substrate; forming a metal layer on the dielectric layer; forming a photoresist patterns smaller than the semiconductor pattern on the metal layer above the semiconductor pattern; etching the metal layer to form a gate electrode smaller than the photoresist pattern; doping high concentration ions by using the photoresist pattern as a mask to form a pair of highly doped regions on the semiconductor pattern not covered by the photoresist pattern; removing the photoresist pattern; and doping low concentration ions by using the gate electrode as a mask to form a pair of lightly doped regions between the highly doped regions and a part of the semiconductor pattern.Type: GrantFiled: January 24, 2014Date of Patent: April 25, 2017Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTDInventor: Tianming Dai
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Publication number: 20160351595Abstract: An array substrate comprises a substrate, a common electrode formed on the substrate, a light shielding layer disposed on the common electrode, an insulating layer disposed on the light shielding layer and the common electrode, a poly-silicon layer, a gate insulating layer, a gate connected with the common electrode by a hole, a medium layer and a source drain. A method for manufacturing the array substrate comprises forming a transparent conductive layer and a first metallic layer on the substrate, forming patterned common electrode and light shielding layer by multiple steps of etching so that a process of photomask can be saved, and forming holes connecting with the common electrode and the gate by a photomask etching process, then manufacturing a medium layer and a source drain. The method adopts seven processes of photomask so that the process is simplified, and the cost is lowered.Type: ApplicationFiled: January 21, 2015Publication date: December 1, 2016Applicant: Shenzhen China Star Optoelectronics Technology Co. Ltd.Inventor: Tianming DAI
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Publication number: 20160343568Abstract: The invention provides a method for forming a surface oxide layer on an amorphous silicon including steps: using a HF acid to clean a surface of the amorphous silicon; using a water to clean the surface of the amorphous silicon being cleaned by the HF acid; drying the surface of the amorphous silicon after being cleaned by the water; using an extreme ultraviolet lithography to form a first oxide layer on the surface of the amorphous silicon after being dried; using an oxidizing solution to clean the surface of the amorphous silicon with the first oxide layer to thereby form a second oxide layer; and drying the surface of the amorphous silicon with the second oxide layer. By using the extreme ultraviolet lithography to form the first oxide layer, the surface of the amorphous silicon is given with strong hydrophilicity and therefore the distribution of water would be uniform.Type: ApplicationFiled: January 13, 2015Publication date: November 24, 2016Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd.Inventor: Tianming DAI
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Publication number: 20160315173Abstract: A method of manufacturing a display panel having a plurality of lightly doped drain thin film transistors arranged as a matrix includes forming a semiconductor pattern with a predetermined shape on a substrate; forming a dielectric layer covering the semiconductor pattern on the substrate; forming a metal layer on the dielectric layer; forming a photoresist patterns smaller than the semiconductor pattern on the metal layer above the semiconductor pattern; etching the metal layer to form a gate electrode smaller than the photoresist pattern; doping high concentration ions by using the photoresist pattern as a mask to form a pair of highly doped regions on the semiconductor pattern not covered by the photoresist pattern; removing the photoresist pattern; and doping low concentration ions by using the gate electrode as a mask to form a pair of lightly doped regions between the highly doped regions and a part of the semiconductor pattern.Type: ApplicationFiled: January 24, 2014Publication date: October 27, 2016Inventor: Tianming DAI
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Publication number: 20160247839Abstract: A method for manufacturing a thin film transistor array substrate includes: forming a polysilicon layer on the substrate; forming a gate insulating layer on the polysilicon layer; forming a metal oxide layer on the gate insulating layer; forming a gate metal layer on the metal oxide layer; etching the metal oxide layer to define a gate; using the gate as a second mask and etching the metal oxide layer excluding a scope of the second mask; performing ion-implantation by using the gate and a remainder of the metal oxide layer as a third mask to form two lightly doped drain regions at opposite sides of the polysilicon layer; forming an insulating layer on the gate and the gate insulating layer respectively; forming a metal layer on the insulating layer and defining a drain and a source which connect to the doped drain region and the doped source region respectively.Type: ApplicationFiled: May 16, 2014Publication date: August 25, 2016Inventor: Tianming DAI
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Patent number: 9419029Abstract: A method for manufacturing a thin film transistor array substrate includes: forming a polysilicon layer on the substrate; forming a gate insulating layer on the polysilicon layer; forming a metal oxide layer on the gate insulating layer; forming a gate metal layer on the metal oxide layer; etching the metal oxide layer to define a gate; using the gate as a second mask and etching the metal oxide layer excluding a scope of the second mask; performing ion-implantation by using the gate and a remainder of the metal oxide layer as a third mask to form two lightly doped drain regions at opposite sides of the polysilicon layer; forming an insulating layer on the gate and the gate insulating layer respectively; forming a metal layer on the insulating layer and defining a drain and a source which connect to the doped drain region and the doped source region respectively.Type: GrantFiled: May 16, 2014Date of Patent: August 16, 2016Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventor: Tianming Dai
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Patent number: 9368635Abstract: A manufacturing method of an array substrate, comprising the following steps: S1: forming a pattern comprising a semiconductor layer (2), a gate insulating layer (4), a gate electrode (5) and a gate line on a substrate (1); S2: on the substrate (1) subjected to the step S1, forming a metal diffusion layer (3) on the pattern of the semiconductor layer (2) which is not covered by the gate insulating layer (4) and forming a barrier layer (6) in other regions; S3: forming a passivation layer (7) on the substrate (1) subjected to the step S2; and S4: forming a pattern of via holes (11), source and drain electrodes (81, 82), a data line and a pixel electrode (9) on the passivation layer (7), the source and drain electrodes (81, 82) being which being connected to the metal diffusion layer (3) through the via holes (11) respectively. With this method, the process flow is simplified, and the process costs are reduced.Type: GrantFiled: November 15, 2012Date of Patent: June 14, 2016Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Tianming Dai, Qi Yao, Feng Zhang, Zhanfeng Cao
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Patent number: 9159805Abstract: Embodiments of the present invention provide a thin film transistor (TFT) array substrate and a method for manufacturing the same and a display device. The TFT array substrate improves a structure of a TFT array substrate and has a small thickness, and process flow is simplified. The method for manufacturing a thin film transistor (TFT) array substrate comprises: obtaining a gate line and a gate electrode through a first patterning process on a glass substrate; forming a gate insulating layer on the gate line and the gate electrode; forming a graphene layer on the gate insulating layer, and obtaining a semiconductor active layer over the gate electrode by a second patterning process and a hydrogenation treatment; obtaining a data line, a source electrode, a drain electrode and a pixel electrode which are located on the same layer by a third patterning process; and forming a protection layer on the data line, the source electrode, the semiconductor active layer, the drain electrode and the pixel electrode.Type: GrantFiled: September 28, 2012Date of Patent: October 13, 2015Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Tianming Dai, Jianshe Xue, Qi Yao, Feng Zhang
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Patent number: 9147855Abstract: The embodiments of the present invention relate to a light emitting diode and manufacturing method thereof. The electroluminescent layer of the light-emitting diode is formed of graphene/compound semiconductor quantum dot composites.Type: GrantFiled: October 22, 2013Date of Patent: September 29, 2015Assignee: BOE Technology Group Co., Ltd.Inventors: Feng Zhang, Tianming Dai, Qi Yao
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Patent number: 9099440Abstract: Embodiments of the present invention disclose a manufacturing method of an array substrate, an array substrate and a display. The manufacturing method comprises: forming a gate electrode of a TFT on a substrate; forming a metal oxide semiconductor thin film and a top metal thin film, and performing a mask process to the metal oxide semiconductor thin film and the top metal thin film, in order to form an active layer opposing the gate electrode and a source electrode and a drain electrode of the TFT respectively; and forming a passivation layer overlying the source electrode and the drain electrode, wherein during the mask process to the top metal thin film, a hydrogen peroxide-based etchant with a pH value between 6 and 8 is used to etch the top metal thin film.Type: GrantFiled: November 21, 2012Date of Patent: August 4, 2015Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Qi Yao, Tianming Dai, Feng Zhang, Zhanfeng Cao, Peiyu Zhu
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Publication number: 20150187830Abstract: The present disclosure relates to a photosensitive unit, an array substrate of a display panel and a manufacturing method thereof. In the photosensitive unit, a PIN structure is adopted for photoelectric conversion, and the generated photocurrent has low probability of dramatic change due to the fluctuation of a working voltage, and thus the accuracy is relatively high. In addition, because the photosensitive unit preferably has the PIN structure arranged longitudinally, when the photosensitive unit is configured on the array substrate of the display panel, the sizes of the length, width and height of the intrinsic region can be designed in a more flexible manner. Therefore, the photosensitive region of the photosensitive unit can be enlarged to a maximum extent, and the photoelectric conversion efficiency can be improved.Type: ApplicationFiled: January 20, 2014Publication date: July 2, 2015Inventor: Tianming Dai
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Patent number: 9040368Abstract: A method for fabricating a thin film transistor has the steps of: sequentially forming a buffer layer and a poly-silicon layer; forming a gate insulating layer on the poly-silicon layer, and etching the gate insulating layer to expose the poly-silicon layer needed for an ohmic contact; forming an ohmic contact layer on the gate insulating layer and the poly-silicon layer, and etching an extra portion of the ohmic contact layer to reserve the ohmic contact layer contacted with the poly-silicon layer; forming a gate electrode on the gate insulating layer; forming a dielectric layer on the gate electrode and the gate insulating layer, as well as forming through holes; and forming a source electrode and a drain electrode on the through hole.Type: GrantFiled: May 14, 2014Date of Patent: May 26, 2015Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventor: Tianming Dai
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Publication number: 20140212659Abstract: Embodiments of the present invention provide an antistatic protective film, a display device, and a preparation method of an antistatic protective film. The antistatic protective film comprises: a layer of substrate and a layer of graphene; the substrate and the graphene layer are adhered together. The antistatic protective film in accordance with the embodiment of the present invention, utilizes graphene to protect a component from being scratched by a foreign object or damaged by rubbing, and at the same time allows static electricity on an electronic component to be discharged in time, thus avoids the electronic component from being damaged by static electricity and prolongs the service life of the electronic component; meanwhile, the antistatic protective film has high light-transmittance, which greatly reduces the influence of the antistatic protective film on the output light of the electronic component.Type: ApplicationFiled: September 24, 2012Publication date: July 31, 2014Applicant: BOE Technology Group Co., Ltd.Inventors: Tianming Dai, Jianshe Xue
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Patent number: 8755104Abstract: Embodiments of the present disclosure provide an electrowetting display panel and the manufacturing method thereof The electrowetting display panel comprises: a first glass substrate; a second glass substrate provided opposite to the first glass substrate; a cavity provided between the first glass substrate and the second glass substrate; a colored conductive liquid filled into the cavity; and a reflecting conductive element provided on the surface of the first glass substrate facing away from the second glass substrate, and corresponding to the cavity, wherein the reflecting conductive element is used for controlling the light transmissivity of the colored conductive liquid within the cavity according to the voltage applied to the reflecting conductive element and reflecting the light passing through the colored conductive liquid toward the second glass substrate.Type: GrantFiled: October 16, 2012Date of Patent: June 17, 2014Assignee: BOE Technology Group Co., Ltd.Inventors: Qi Yao, Jianshe Xue, Zhanfeng Cao, Tianming Dai, Feng Zhang
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Publication number: 20140110665Abstract: The embodiments of the present invention relate to a light emitting diode and manufacturing method thereof. The electroluminescent layer of the light-emitting diode is formed of graphene/compound semiconductor quantum dot composites.Type: ApplicationFiled: October 22, 2013Publication date: April 24, 2014Applicant: BOE Technology Group Co., Ltd.Inventors: Feng Zhang, Tianming Dai, Qi Yao