Abstract: An apparatus comprises a noisy bias voltage generator circuit, a random seed generator circuit, and a random series generator circuit. The noisy bias voltage generator circuit may be configured to generate a plurality of noisy bias voltages in response to a plurality of input voltage signals and a first bias current signal. The random seed generator circuit may be configured to generate a random seed in response to the plurality of noisy bias voltages and a second bias current signal. The random series generator circuit may be configured to generate a series of true random bits in response to the random seed and a clock signal.

Abstract: An apparatus includes a slicer circuit, a frequency acquisition circuit, a phase acquisition circuit and an oscillator circuit. The slicer circuit may be configured to (i) generate an output signal by slicing a data signal in response to a clock signal and (ii) generate a crossing signal in response to the data signal and the clock signal. The frequency acquisition circuit may be configured to generate a first control signal and a second control signal in response to the data signal and the clock signal. The phase acquisition circuit may be configured to generate a third control signal in response to the first control signal and the data crossing signal. The oscillator circuit may be configured to generate the clock signal in response to the second control signal and the third control signal. The second control signal may shift an adjustable frequency range of the clock signal.

Abstract: A networked system includes a plurality of devices that access user portals, a plurality of digital displays located in a retail store alongside retail or product displays and a real-time data store and processor. Each digital display displays content related to the retail or product displays, includes sensors and a camera and is configured to create user sessions with date and time stamps based on each camera detecting an anonymous customer's face. The processor is configured to analyze data collected from the sensors of each digital display during each user session to determine real-time in-store customer insight data related to in-store customer behavior and configured to relay the insight data to the user portals accessed by the plurality of devices.

Abstract: Device health metrics may be collected and aggregated on a device before sending to a server for further aggregation. The method may include determining a crash has occurred on a device, and recording the crash and information corresponding to the crash in buffer storage on the device. The method may also include recording a crash type, a crash time, an identification of a component that caused the crash and a state of the device when the crash occurred. The method may also include grouping two or more crash events based on the crash type, generating device health metrics data including metadata corresponding to the two or more crash events, storing the device health metrics data in the buffer storage on the device, and sending the device health metrics data along with device identification information to a server for further aggregation.

Abstract: A delta-sigma fractional-N frequency synthesizer having a charge pump with error canceling circuitry eliminates a non-linear term from the charge pump transfer function. The charge pump includes a matched pair of charging current sources, each supplying a first current IP1 to a common node, when enabled. The charge pump also includes a matched pair of discharging current sources, each sinking a second current IN1 from the common node, when enabled. The error canceling circuitry includes a charging current source, which supplies a current equal to the second current IN1 to the common node, when enabled. The error canceling circuitry also includes a discharging current source, which sinks a current equal to the first current IP1 from the common node, when enabled. The charging and discharging current sources of the error canceling circuitry are both enabled when either one of the matched pairs of charging and discharging current sources is enabled.

Abstract: A delta-sigma fractional-N frequency synthesizer having a charge pump with error canceling circuitry eliminates a non-linear term from the charge pump transfer function. The charge pump includes a matched pair of charging current sources, each supplying a first current IP1 to a common node, when enabled. The charge pump also includes a matched pair of discharging current sources, each sinking a second current IN1 from the common node, when enabled. The error canceling circuitry includes a charging current source, which supplies a current equal to the second current IN1 to the common node, when enabled. The error canceling circuitry also includes a discharging current source, which sinks a current equal to the first current IP1 from the common node, when enabled. The charging and discharging current sources of the error canceling circuitry are both enabled when either one of the matched pairs of charging and discharging current sources is enabled.