Abstract: A pixel circuit, a driving method therefor, a display substrate and a display apparatus, the pixel circuit includes a node control sub-circuit, a storage sub-circuit, a driving sub-circuit and a light emitting control sub-circuit; the storage sub-circuit is electrically connected to a second node and a first power supply line respectively, and is configured to charge the second node when a first scanning signal line is an effective level signal.

Abstract: A display substrate includes: a base substrate and a plurality of sub-pixels arranged on the base substrate, the sub-pixel include a sub-pixel driving circuit, the sub-pixel driving circuit includes: a first transistor, a driving transistor, and a first conductive connection portion; a first electrode of the first transistor is coupled to a second electrode of the driving transistor, a second electrode of the first transistor and a first end portion of the first conductive connection portion are arranged at different layers, the second electrode of the first transistor and the first end portion of the first conductive connection portion are coupled through a via hole; a second end portion of the first conductive connection portion is coupled to a gate electrode of the driving transistor.

Abstract: A display substrate includes: a base substrate and a plurality of sub-pixels arranged on the base substrate, the sub-pixel include a sub-pixel driving circuit, the sub-pixel driving circuit includes: a first transistor, a driving transistor, and a first conductive connection portion; a first electrode of the first transistor is coupled to a second electrode of the driving transistor, a second electrode of the first transistor and a first end portion of the first conductive connection portion are arranged at different layers, the second electrode of the first transistor and the first end portion of the first conductive connection portion are coupled through a via hole; a second end portion of the first conductive connection portion is coupled to a gate electrode of the driving transistor.

Abstract: Provided are a display substrate, a driving method thereof, and a display apparatus. The display substrate includes multiple sub-pixels, a sub-pixel includes a pixel drive circuit and a light emitting device, the pixel drive circuit includes an initial signal line (INIT), a reset signal line (Reset) and multiple transistors, the initial signal line includes a first branch (INIT-1). Multiple transistors include a drive transistor, a first reset transistor and a second reset transistor, the drive transistor provides a drive current to the light emitting device, the first reset transistor resets a gate of the drive transistor through the INIT-1 under control of the reset signal line. The second reset transistor resets a first terminal of the light emitting device through the INIT-1 under control of the reset signal line. The first reset transistor and the second reset transistor in a same sub-pixel are controlled by a same reset signal line.

Abstract: A displaying base board includes an active area and a peripheral region, the peripheral region includes at least a first blocking part and a second blocking part; the peripheral region further includes a first power-supply signal line, and an orthographic projection of the first power-supply signal line on a substrate of the displaying base board has an overlapping part with individually an orthographic projection of the first blocking part on the substrate and an orthographic projection of the second blocking part on the substrate; and the first power-supply signal line is provided with a plurality of openings, and a region enclosed by orthographic projections on the substrate of outer contours of some of the openings falls within a region of the orthographic projection on the substrate of at least one of the first blocking part and the second blocking part.

Abstract: A display panel, a driving method, and a display device. The display panel includes: a base substrate, subpixels, driving lines, data lines, a gate driving circuit including clock signal lines and shift register units arranged in extension direction of clock signal lines. The clock signal lines is divided into clock signal line groups; the shift register units is divided into register unit groups; the shift register units in same register unit group are cascaded, adjacent two of shift register units in the extension direction are in different register unit groups; one register unit group corresponds to one clock signal line group; the gate of an input transistor is connected to a clock signal line in a corresponding clock signal line group, the second pole of input transistor is connected to the gate of an output transistor; the second pole of output transistor is connected to at least one driving line.

Abstract: A pixel circuit includes a driving sub-circuit, a data writing sub-circuit, a compensation sub-circuit, a storage sub-circuit, and a first control sub-circuit. The data writing sub-circuit is configured to write a data signal provided by a data line into a second node under control of a first scan line. The compensation sub-circuit is configured to write a threshold voltage of the driving sub-circuit into the first node under control of a second scan line. The first control sub-circuit is configured to provide a reference voltage signal provided by a reference voltage line to the second node under control of the first control line after the data writing sub-circuit writes the data signal into the second node, so that the data signal written into the second node is coupled to the first node through the storage sub-circuit.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and a plurality of pixel circuits, the plurality of pixel circuits are arranged on the base substrate in an array, the plurality of pixel circuits include a plurality of active patterns, each of the plurality of active patterns extends along a first direction, the plurality of active patterns are arranged along a second direction, adjacent active patterns are spaced apart from each other in the second direction, and at least one of the plurality of active patterns comprises at least one disconnection position to form a plurality of active sub-patterns independent of each other.

Abstract: The present disclosure provides a driving circuitry, a driving method, a driving module, and a display device. The driving circuitry includes a driving signal generation circuitry, a gating circuitry, an output control circuitry and an output circuitry. The driving signal generation circuitry is configured to perform a shifting operation on an (N?1)th-level driving signal to obtain an Nth-level driving signal. The gating circuitry is configured to write a gating input signal into a first node under the control of a gating control signal. The output control circuitry is configured to perform an NAND operation on the Nth-level driving signal and a potential at a second end of the output control circuitry to obtain a first output signal. The output circuitry is configured to perform phase inversion on the first output signal to obtain and provide an output driving signal through an output driving end, where N is a positive integer.

Abstract: This disclosure provides a display substrate, a display, and a display substrate driving method. The display substrate includes a first-category pixel row, a second-category pixel row, a first drive line, a second drive line and at least one category of data signal source; a first gate on array (GOA) circuit is used for providing a starting signal of a first frequency to the first-category pixel row; a second GOA circuit is used for providing a starting signal of a second frequency to the second-category pixel row; the at least one category of data signal source is used for supplying a data signal to data signal lines of the first-category pixel row and the second-category pixel row.

Abstract: A shift register includes a shift module configured for causing the cascade signal output end to output a cascade signal in response to a signal of the input signal end; an reverse output module configured for causing the reverse signal output end to output a signal reverse to the cascade signal output end in response to a signal of the cascade signal output end; a latch module configured for causing an output end of the latch module to output a control signal of the masking signal end in response to signals of the cascade signal output end and the reverse signal output end of a previous level; and a selection output module configured for providing a signal of the first power supply end or the second power supply end to the driving signal output end in response to a signal of the output end of the latch module.

Abstract: A display substrate, a manufacturing method thereof and a display apparatus are provided.

Abstract: A drive control circuit includes an input circuit, a first output circuit and a first output control circuit. An input circuit is configured to control the potentials of a first node and a second node under the control of a signal input terminal and a clock signal terminal. The first output circuit is configured to provide a first power supply signal to a third node under the control of a first node or to provide a second power supply signal to a first output terminal under the control of a second node. The first output control circuit is configured to turn on or turn off the third node and the first output terminal under the control of the first control terminal.

Abstract: Disclosed are a pixel circuit, a driving method thereof, a display panel and a display apparatus, relating to the technical field of display. The pixel circuit comprises a drive transistor, a data writing module, a compensation adjustment module and a first reset module. A gate, a first electrode and a second electrode of the drive transistor are respectively connected with a first node, a second node and a third node; the data writing module is connected with a first scanning control signal terminal, a data signal terminal and the second node; the compensation adjustment module is connected with a second scan control signal terminal, the first node and the third node; the first reset module is connected with a first reset control signal terminal, the first node and a first initialization signal terminal.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and a plurality of subpixels provided on the base substrate. Each subpixel includes a pixel circuit. The plurality of subpixels include first subpixels. The display substrate further includes power lines. Each power line is configured to provide a first supply voltage for the corresponding first subpixels, the power line is provided on a side of the pixel electrode of the first subpixel near the base substrate, and the power line includes a power line main body and a power line protrusion protruded from the power line main body. The power line protrusion is at least partially overlapped with the pixel electrode of the first subpixel in a direction perpendicular to the base substrate. The display substrate can effectively improve the display quality.

Abstract: A display substrate includes a base substrate (100), and multiple pixel circuits (11a, 11b) and multiple first auxiliary structures disposed on the base substrate (100). The multiple first auxiliary structures are located at edges of the multiple pixel circuits (11a, 11b). At least one first auxiliary structure is adjacent to at least one pixel circuit (11a, 11b). The multiple pixel circuits (11a, 11b) include at least one semiconductor layer located on the base substrate (100). An orthographic projection of the at least one first auxiliary structure on the base substrate (100) is at least partially identical to an orthographic projection of the semiconductor layer of the at least one pixel circuit (11a, 11b) on the base substrate (100).

Abstract: The present disclosure provides a driving circuitry, a driving method, a driving module, and a display device. The driving circuitry includes a driving signal generation circuitry, a gating circuitry, an output control circuitry and an output circuitry. The driving signal generation circuitry is configured to perform a shifting operation on an (N?1)th-level driving signal to obtain an Nth-level driving signal. The gating circuitry is configured to write a gating input signal into a first node under the control of a gating control signal. The output control circuitry is configured to perform an NAND operation on the Nth-level driving signal and a potential at a second end of the output control circuitry to obtain a first output signal. The output circuitry is configured to perform phase inversion on the first output signal to obtain and provide an output driving signal through an output driving end, where N is a positive integer.

Abstract: A pixel circuit includes a driving sub-circuit coupled to a first node, a second node and a third node, a compensation sub-circuit coupled to the first node, the third node and a first scan signal terminal, an adjustment sub-circuit, and a writing sub-circuit. The compensation sub-circuit includes a first transistor group, and the first transistor group includes at least two first transistors connected in series. A fourth node is formed between a second electrode of a first first transistor and a first electrode of a second first transistor. The adjustment sub-circuit is coupled to the fourth node and at least one control terminal. The adjustment sub-circuit is configured to, in light-emitting phases, adjust a voltage of the fourth node under a control of a signal from the at least one control terminal, so as to reduce a voltage difference between the fourth node and the first node.

Abstract: Provided are a display panel, a manufacturing method, and a display device. The display panel includes: a substrate including a display area and a peripheral area; a driving circuit layer including: a pixel circuit in the display area, and a gate driver circuit on a side of the pixel circuit in proximity to the peripheral area, and at least partially in the display area; a first metal layer on a side of the driving circuit layer away from the substrate, insulated from the driving circuit layer; and a first electrode layer in the display area and on a side of the first metal layer away from the substrate, insulated from the first metal layer, and electrically connected to the pixel circuit; where orthographic projections, on the substrate, of the first electrode layer, the first metal layer, and the gate driver circuit, are at least partially overlapped.

Abstract: A display panel and a display device are provided. The display panel includes: a display region; a peripheral region surrounding the display region; a plurality of pixel units, located in the display region and configured to display an image; a plurality of data lines, electrically connected with the plurality of pixel units and configured to input data signals to the plurality of pixel units; a plurality of data transmission lines, located in the peripheral region and connected with the plurality of data lines; and at least two repair structures, wherein each of the at least two repair structures includes a first repair line and a second repair line, the first repair line is overlapped with the plurality of data transmission lines, and the second repair line is overlapped with the plurality of data lines.