Patents by Inventor Tiehu LI

Tiehu LI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Error compensation correction system and method for analog-to-digital converter with time interleaving structure
    Patent number: 11239852
    Abstract: The present disclosure provides an error compensation correction system and method for an analog-to-digital converter with a time interleaving structure, the system includes an analog-to-digital converter with a time interleaving structure, a master clock module, a packet clock module, an error correction module, an adaptive processing module and an overall MUX circuit. Through the error compensation correction system and method for the analog-to-digital converter with a time interleaving structure according to the present disclosure, lower correction hardware implementation complexity and higher stability are ensured. The system and method according to the present disclosure are particularly suitable for interchannel mismatch error correction of dense channel time interleaving ADC, and the performance of the time interleaving ADC is improved.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: February 1, 2022
    Assignee: NO.24 RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION
    Inventors: Jie Pu, Gangyi Hu, Jian'an Wang, Guangbing Chen, Liang Li, Ting Li, Daiguo Xu, Xingfa Huang, Xi Chen, Tiehu Li, Youhua Wang
  • ERROR COMPENSATION CORRECTION SYSTEM AND METHOD FOR ANALOG-TO-DIGITAL CONVERTER WITH TIME INTERLEAVING STRUCTURE
    Publication number: 20210135678
    Abstract: The present disclosure provides an error compensation correction system and method for an analog-to-digital converter with a time interleaving structure, the system includes an analog-to-digital converter with a time interleaving structure, a master clock module, a packet clock module, an error correction module, an adaptive processing module and an overall MUX circuit. Through the error compensation correction system and method for the analog-to-digital converter with a time interleaving structure according to the present disclosure, lower correction hardware implementation complexity and higher stability are ensured. The system and method according to the present disclosure are particularly suitable for interchannel mismatch error correction of dense channel time interleaving ADC, and the performance of the time interleaving ADC is improved.
    Type: Application
    Filed: July 25, 2018
    Publication date: May 6, 2021
    Applicant: NO.24 RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION
    Inventors: Jie PU, Gangyi HU, Jian'an WANG, Guangbing CHEN, Liang LI, Ting LI, Daiguo XU, Xingfa HUANG, Xi CHEN, Tiehu LI, Youhua WANG