Patents by Inventor Tien D. Luong

Tien D. Luong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7500123
    Abstract: Briefly, the present invention includes a method and an apparatus for reducing power consumption in a graphics processing device. The apparatus and method include a memory module monitoring device operative to receive a memory module status signal from memory modules. The memory module monitoring device is operative to generate a clock control signal in response to the memory module status signal. The apparatus and method further include a clock cycle reduction circuit coupled to the monitoring module. The clock cycle reduction circuit receives the clock control signal. The clock cycle reduction circuit generates a reduced cycle clock signal in response to the clock control signal such that the reduced cycle clock signal reduces power consumption in the graphics processing device.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: March 3, 2009
    Assignee: ATI Technologies ULC
    Inventors: Tien D. Luong, Erwin Pang
  • Publication number: 20080250212
    Abstract: A method and apparatus stores data representing a non 1:1 memory access interleaving ratio for accessing a plurality of memories. The method and apparatus interleaves memory accesses to at least either a first memory that is accessible via a first (and associated memory) bus having first characteristics or a second memory accessible via a second bus having different characteristics, based on the data representing the non 1:1 interleaving memory access ratio.
    Type: Application
    Filed: April 9, 2007
    Publication date: October 9, 2008
    Applicant: ATI Technologies ULC
    Inventors: Anthony Asaro, Jacky Chun Kit Yan, Tien D. Luong, Andy Chih-Ping Chen
  • Publication number: 20050289377
    Abstract: Briefly, the present invention includes a method and an apparatus for reducing power consumption in a graphics processing device. The apparatus and method include a memory module monitoring device operative to receive a memory module status signal from memory modules. The memory module monitoring device is operative to generate a clock control signal in response to the memory module status signal. The apparatus and method further include a clock cycle reduction circuit coupled to the monitoring module. The clock cycle reduction circuit receives the clock control signal. The clock cycle reduction circuit generates a reduced cycle clock signal in response to the clock control signal such that the reduced cycle clock signal reduces power consumption in the graphics processing device.
    Type: Application
    Filed: June 28, 2004
    Publication date: December 29, 2005
    Applicant: ATI Technologies Inc.
    Inventors: Tien D. Luong, Erwin Pang