Abstract: A method and apparatus for reducing particle contamination on wafers is disclosed. The method includes providing a semiconductor furnace system having an ideal reaction chamber, an electrostatic generator, a conducting wire, and a conductive ring. Moreover, an insulating layer is coated over the entire wafer boat carrier, that is part of the reaction chamber. Charges with a first polarity are generated after a reaction process carried out inside the chamber and before the “vacuum breaking” stage. These charges spread evenly across the entire exposed surface of the wafer boat carrier and repulse particles carrying the same polarity away from the wafers that are in process.

Abstract: A drafting apparatus in a furnace. A buffer board having a plurality of gas intakes is disposed in a front end of the drafting apparatus. A laminar flow board having a plurality of gas outtakes is disposed in a rear end of the drafting apparatus. A drafting region is enclosed by the drafting apparatus. The drafting region comprises at least one drafting board to draft and redirect the gas flow. A laminar flow is then obtained to flow through the outtakes on the laminar board.

Abstract: A buried wiring line. The structure of the buried wiring line at least comprises a conductive doped region in a provided substrate and a silicon nitride region formed around the conductive doped region in the substrate. The silicon nitride region, which comprises a first silicon nitride below the doped region and a second silicon nitride layer beside the doped region, isolates the buried wiring line from the substrate.

Abstract: The present invention provides a method for enhancing the reliability of a dielectric layer of a semiconductor wafer. The dielectric layer is formed above a silicon element. First, the method implants argon ions with a dosage of around 1015˜1016 ions/cm3 and an energy of around 3˜50 KeV into the silicon element to form an ion implantation layer. Then, the dielectric layer is formed on a predetermined area of the silicon element. The ion implantation layer prevents oxygen ions, impurities and charge carriers from converging on the surface of the silicon element so as to enhance the reliability of the dielectric layer.

Abstract: The invention relates to a method of forming a stack-gate of a non-volatile memory. In this method, the stack-gate is formed in a predetermined region of the substrate of a semiconductor wafer. Then, a gate oxide layer, a first gate conductive layer, a dielectric layer, and a passivation layer are formed followed by lithography and stripping of the photo-resist layer and removal of the passivation layer from the dielectric layer. Finally, a second gate conductive layer is formed on the dielectric layer as the control gate of the stack-gate. The passivation layer can prevent the dielectric layer from being damaged during stripping of the photo-resist layer.

Abstract: A furnace tube with quartz plug is configured to have an oxidation performed therein, and at least one elongated protruding portion with an opening on one side of the tube. The furnace also includes a quartz plug with a portion thereof inserted inside the elongated protruding portion, and with another portion thereof inserted into the tube. Accordingly, water resided in a gap between inner surface of the elongated protruding portion and outer surface of the quartz plug can be evaporated by self-heating of the quartz plug.

Abstract: A drafting apparatus in a furnace. A buffer board having a plurality of gas intakes is disposed in a front end of the drafting apparatus. A laminar flow board having a plurality of gas outtakes is disposed in a rear end of the drafting apparatus. A drafting region is enclosed by the drafting apparatus. The drafting region comprises at least one drafting board to draft and redirect the gas flow. A laminar flow is then obtained to flow through the outtakes on the laminar board.

Abstract: A horizontal oxidation furnace injector comprising an inner tube and an outer tube. The inner tube has an inner tube inlet and an inner tube outlet. The inner tube inlet is used for receiving a first gas and the inner tube outlet is used for outputting the first gas. The outer tube has a branch tube and an outer tube outlet. The branch tube further includes an outer tube inlet. The outer tube inlet is used for receiving a second gas, and the outer tube outlet is used for outputting the secord gas. Furthermore, the outer tube outlet and the inner tube outlet are at the same end. In addition, part of the inner tube is enclosed by the outer tube of the injector while the remainder of the inner tube is exposed, and the inner tube has no bends.