Patents by Inventor Tien Minh Quan Tran

Tien Minh Quan Tran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230063178
    Abstract: A microelectronic device includes a stack structure including a vertically alternating sequence of conductive structures and insulating structures arranged in tiers, a dielectric-filled opening vertically extending into the stack structure and defined between two internal sidewalls of the stack structure, a stadium structure within the stack structure and comprising steps defined by horizontal ends of at least some of the tiers, a first ledge extending upward from a first uppermost step of the steps of the stadium structure and interfacing with a first internal sidewall of the two internal sidewalls of the stack structure, and a second ledge extending upward from a second, opposite uppermost step of the steps of the stadium structure and interfacing with a second, opposite internal sidewall of the two internal sidewalls.
    Type: Application
    Filed: December 29, 2021
    Publication date: March 2, 2023
    Inventors: Bo Zhao, Matthew J. King, Jason Reece, Michael J. Gossman, Shruthi Kumara Vadivel, Martin J. Barclay, Lifang Xu, Joel D. Peterson, Matthew Park, Adam L. Olson, David A. Kewley, Xiaosong Zhang, Justin B. Dorhout, Zhen Feng Yow, Kah Sing Chooi, Tien Minh Quan Tran, Biow Hiem Ong
  • Patent number: 11563027
    Abstract: Microelectronic devices include a lower deck and an upper deck, each comprising a stack structure with a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. A lower array of pillars extends through the stack structure of the lower deck, and an upper array of pillars extends through the stack structure of the upper deck. Along an interface between the lower deck and the upper deck, the pillars of the lower array align with the pillars of the upper array. At least at elevations comprising bases of the pillars, a pillar density of the pillars of the lower array differs from a pillar density of the pillars of the upper array, “pillar density” being a number of pillars per unit of horizontal area of the respective array. Related methods and electronic systems are also disclosed.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: January 24, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Md Zakir Ullah, Xiaosong Zhang, Adam L. Olson, Mohammad Moydul Islam, Tien Minh Quan Tran, Chao Zhu, Zhigang Yang, Merri L. Carlson, Hui Chin Chong, David A. Kewley, Kok Siak Tang
  • Publication number: 20220077177
    Abstract: Microelectronic devices include a lower deck and an upper deck, each comprising a stack structure with a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. A lower array of pillars extends through the stack structure of the lower deck, and an upper array of pillars extends through the stack structure of the upper deck. Along an interface between the lower deck and the upper deck, the pillars of the lower array align with the pillars of the upper array. At least at elevations comprising bases of the pillars, a pillar density of the pillars of the lower array differs from a pillar density of the pillars of the upper array, “pillar density” being a number of pillars per unit of horizontal area of the respective array. Related methods and electronic systems are also disclosed.
    Type: Application
    Filed: September 9, 2020
    Publication date: March 10, 2022
    Inventors: Md Zakir Ullah, Xiaosong Zhang, Adam L. Olson, Mohammad Moydul Islam, Tien Minh Quan Tran, Chao Zhu, Zhigang Yang, Merri L. Carlson, Hui Chin Chong, David A. Kewley, Kok Siak Tang