Abstract: A circuit board includes chip die mounted on a three dimensional rectangular structure, a three dimensional triangular prism structure, or a combination thereof. A ball grid array for the chip die mounted on any such three dimensional structure is interposed between the three dimensional structure and the circuit board itself.

Abstract: Edge-connected semiconductor systems are described along with methods of making and using the same. First and second integrated circuit packages are obtained, each including a substrate assembly having top and bottom sides and an edge that extends between the top and the bottom sides. Edge contacts are disposed on the edges of the substrate assemblies. A ganged assembly is formed by establishing conductive paths between the edge contacts of the substrate assemblies. The ganged assembly is coupled to a printed circuit board (“PCB”) by coupling host contacts on one or more of the substrate assemblies to corresponding contacts on the PCB.

Abstract: Through-hole mounted semiconductor assemblies are described. A printed circuit board (“PCB”) has first and second PCB sides and has a through hole therein. The through hole defines a hole area. A semiconductor package may be disposed in the hole area such that the semiconductor package is at least partially exposed on one or more of the first and the second PCB sides. Package contacts on the semiconductor package may be electrically coupled to PCB contacts disposed on one or more of the PCB sides. In some embodiments, one or more support structures may be coupled to the PCB and may touch the semiconductor package. In some embodiments, cooling devices may be placed in thermal communication with the semiconductor package on both sides of the PCB.

Abstract: Edge-connected semiconductor systems are described along with methods of making and using the same. First and second integrated circuit packages are obtained, each including a substrate assembly having top and bottom sides and an edge that extends between the top and the bottom sides. Edge contacts are disposed on the edges of the substrate assemblies. A ganged assembly is formed by establishing conductive paths between the edge contacts of the substrate assemblies. The ganged assembly is coupled to a printed circuit board (“PCB”) by coupling host contacts on one or more of the substrate assemblies to corresponding contacts on the PCB.

Abstract: Through-hole mounted semiconductor assemblies are described. A printed circuit board (“PCB”) has first and second PCB sides and has a through hole therein. The through hole defines a hole area. A semiconductor package may be disposed in the hole area such that the semiconductor package is at least partially exposed on one or more of the first and the second PCB sides. Package contacts on the semiconductor package may be electrically coupled to PCB contacts disposed on one or more of the PCB sides. In some embodiments, one or more support structures may be coupled to the PCB and may touch the semiconductor package. In some embodiments, cooling devices may be placed in thermal communication with the semiconductor package on both sides of the PCB.

Abstract: Scalable displaying for a mobile device is provided, including receiving an instruction to scale a display of the mobile device, and scaling the display on a screen of the mobile device in response to the instruction. The scalable displaying for the mobile device can be provided by activating only a portion of the screen of the mobile device for use as a display, such that an overall power consumed by the screen is reduced.

Abstract: The present invention provides a printed circuit board and a layout method thereof and an electronic equipment. On the printed circuit board is arranged a first processor chip and a second processor chip, wherein the first processor chip is arranged on a first surface of the printed circuit board; the second processor chip is arranged on a second surface of the printed circuit board; and a first through-hole is disposed on the printed circuit board, part of pins of the first processor chip being connected to part of pins of the second processor chip via the first through-hole.