Patents by Inventor Tihu Wang
Tihu Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8642450Abstract: A system and a process for forming a semi-conductor device, and solar cells (10) formed thereby. The process includes preparing a substrate (12) for deposition of a junction layer (14); forming the junction layer (14) on the substrate (12) using hot wire chemical vapor deposition; and, finishing the semi-conductor device.Type: GrantFiled: November 9, 2007Date of Patent: February 4, 2014Assignee: Alliance for Sustainable Energy, LLCInventors: Qi Wang, Matthew Page, Eugene Iwaniczko, Tihu Wang, Yanfa Yan
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Publication number: 20100263717Abstract: A system and a process for forming a semi-conductor device, and solar cells (10) formed thereby. The process includes preparing a substrate (12) for deposition of a junction layer (14); forming the junction layer (14) on the substrate (12) using hot wire chemical vapor deposition; and, finishing the semi-conductor device.Type: ApplicationFiled: November 9, 2007Publication date: October 21, 2010Applicant: ALLIANCE FOR SUSTAINABLE ENERGY, LLCInventors: Qi Wang, Matthew Page, Eugene Iwaniczko, Tihu Wang, Yanfa Yan
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Publication number: 20100059117Abstract: A solar cell is provided in which an amorphous semiconductor layer (15) is located on a back surface of a crystalline silicon structure to form a heterojunction. A first contact structure contacts the crystalline layer (14) and a second contact structure contacts the amorphous layer (15). A method of forming the heterojunction solar cell is also provided in which a doped amorphous semiconductor layer (15) is formed on an oppositely doped crystalline silicon layer (14), to form a rear surface heterojunction with the crystalline silicon layer (14). Subsequently a rear surface contact (16) is formed, to contact to the amorphous semiconductor layer (15), and a heavily doped region (13) of the same conductivity type as the crystalline silicon layer (14) is formed in contact with the crystalline silicon layer (14) wherever metal contacts (10) are required contact the crystalline silicon layer (14) to facilitate contact with the subsequently formed metal contact (10).Type: ApplicationFiled: February 8, 2007Publication date: March 11, 2010Applicant: WUXI SUNTECH-POWER CO., LTD.Inventors: Zhengrong Shi, Tihu Wang
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Patent number: 7629236Abstract: In a method of making a c-Si-based cell or a ?c-Si-based cell, the improvement of increasing the minority charge carrier's lifetime, comprising: a) placing a c-Si or polysilicon wafer into CVD reaction chamber under a low vacuum condition and subjecting the substrate of the wafer to heating; and b) passing mixing gases comprising NH3/H2 through the reaction chamber at a low vacuum pressure for a sufficient time and at a sufficient flow rate to enable growth of an a-Si:H layer sufficient to increase the lifetime of the c-Si or polysilicon cell beyond that of the growth of an a-Si:H layer without treatment of the wafer with NH3/H2.Type: GrantFiled: August 26, 2004Date of Patent: December 8, 2009Assignee: Alliance For Sustainable Energy, LLCInventors: Qi Wang, Tihu Wang, Matthew R. Page, Yanfa Yan
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Publication number: 20080092951Abstract: In a method of making a c-Si-based cell or a ?c-Si-based cell, the improvement of increasing the minority charge carrier's lifetime, comprising: a) placing a c-Si or polysilicon wafer into CVD reaction chamber under a low vacuum condition and subjecting the substrate of the wafer to heating; and b) passing mixing gases comprising NH3/H2 through the reaction chamber at a low vacuum pressure for a sufficient time and at a sufficient flow rate to enable growth of an a-Si:H layer sufficient to increase the lifetime of the c-Si or polysilicon cell beyond that of the growth of an a-Si:H layer without treatment of the wafer with NH3/H2.Type: ApplicationFiled: August 26, 2004Publication date: April 24, 2008Inventors: Qi Wang, Tihu Wang, Matthew R. Page, Yanfa Yan
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Patent number: 6984263Abstract: In a single crystal pulling apparatus for providing a Czochralski crystal growth process, the improvement of a shallow melt crucible (20) to eliminate the necessity supplying a large quantity of feed stock materials that had to be preloaded in a deep crucible to grow a large ingot, comprising a gas tight container a crucible with a deepened periphery (25) to prevent snapping of a shallow melt and reduce turbulent melt convection; source supply means for adding source material to the semiconductor melt; a double barrier (23) to minimize heat transfer between the deepened periphery (25) and the shallow melt in the growth compartment; offset holes (24) in the double barrier (23) to increase melt travel length between the deepened periphery (25) and the shallow growth compartment; and the interface heater/heat sink (22) to control the interface shape and crystal growth rate.Type: GrantFiled: November 1, 2001Date of Patent: January 10, 2006Assignee: Midwest Research InstituteInventors: Tihu Wang, Theodore F. Ciszek
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Publication number: 20040200408Abstract: In a single crystal pulling apparatus for providing a Czochralski crystal growth process, the improvement of a shallow melt crucible (20) to eliminate the necessity supplying a large quantity of feed stock materials that had to be preloaded in a deep crucible to grow a large ingot, comprising a gas tight container a crucible with a deepened periphery (25) to prevent snapping of a shallow melt and reduce turbulent melt convection; source supply means for adding source material to the semiconductor melt; a double barrier (23) to minimize heat transfer between the deepened periphery (25) and the shallow melt in the growth compartment; offset holes (24) in the double barrier (23) to increase melt travel length between the deepened periphery (25) and the shallow growth compartment; and the interface heater/heat sink (22) to control the interface shape and crystal growth rate.Type: ApplicationFiled: April 29, 2004Publication date: October 14, 2004Inventors: Tihu Wang, Theodore F Ciszek
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Patent number: 6712908Abstract: Method and apparatus for producing purified bulk silicon from highly impure metallurgical-grade silicon source material at atmospheric pressure. Method involves: (1) initially reacting iodine and metallurgical-grade silicon to create silicon tetraiodide and impurity iodide byproducts in a cold-wall reactor chamber; (2) isolating silicon tetraiodide from the impurity iodide byproducts and purifying it by distillation in a distillation chamber; and (3) transferring the purified silicon tetraiodide back to the cold-wall reactor chamber, reacting it with additional iodine and metallurgical-grade silicon to produce silicon diiodide and depositing the silicon diiodide onto a substrate within the cold-wall reactor chamber. The two chambers are at atmospheric pressure and the system is open to allow the introduction of additional source material and to remove and replace finished substrates.Type: GrantFiled: September 13, 2002Date of Patent: March 30, 2004Assignee: Midwest Research InstituteInventors: Tihu Wang, Theodore F. Ciszek
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Publication number: 20030019429Abstract: Method and apparatus for producing purified bulk silicon from highly impure metallurgical-grade silicon source material at atmospheric pressure. Method involves: (1) initially reacting iodine and metallurgical-grade silicon to create silicon tetraiodide and impurity iodide byproducts in a cold-wall reactor chamber; (2) isolating silicon tetraiodide from the impurity iodide byproducts and purifying it by distillation in a distillation chamber; and (3) transferring the purified silicon tetraiodide back to the cold-wall reactor chamber, reacting it with additional iodine and metallurgical-grade silicon to produce silicon diiodide and depositing the silicon diiodide onto a substrate within the cold-wall reactor chamber. The two chambers are at atmospheric pressure and the system is open to allow the introduction of additional source material and to remove and replace finished substrates.Type: ApplicationFiled: September 13, 2002Publication date: January 30, 2003Inventors: Tihu Wang, Theodore F. Ciszek
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Patent number: 6468886Abstract: Method and apparatus for producing purified bulk silicon from highly impure metallurgical-grade silicon source material at atmospheric pressure. Method involves: (1) initially reacting iodine and metallurgical-grade silicon to create silicon tetraiodide and impurity iodide byproducts in a cold-wall reactor chamber; (2) isolating silicon tetraiodide from the impurity iodide byproducts and purifying it by distillation in a distillation chamber; and (3) transferring the purified silicon tetraiodide back to the cold-wall reactor chamber, reacting it with additional iodine and metallurgical-grade silicon to produce silicon diiodide and depositing the silicon diiodide onto a substrate within the cold-wall reactor chamber. The two chambers are at atmospheric pressure and the system is open to allow the introduction of additional source material and to remove and replace finished substrates.Type: GrantFiled: August 28, 2001Date of Patent: October 22, 2002Assignee: Midwest Research InstituteInventors: Tihu Wang, Theodore F. Ciszek
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Publication number: 20020022088Abstract: Method and apparatus for producing purified bulk silicon from highly impure metallurgical-grade silicon source material at atmospheric pressure. Method involves: (1) initially reacting iodine and metallurgical-grade silicon to create silicon tetraiodide and impurity iodide byproducts in a cold-wall reactor chamber; (2) isolating silicon tetraiodide from the impurity iodide byproducts and purifying it by distillation in a distillation chamber; and (3) transferring the purified silicon tetraiodide back to the cold-wall reactor chamber, reacting it with additional iodine and metallurgical-grade silicon to produce silicon diiodide and depositing the silicon diiodide onto a substrate within the cold-wall reactor chamber. The two chambers are at atmospheric pressure and the system is open to allow the introduction of additional source material and to remove and replace finished substrates.Type: ApplicationFiled: August 28, 2001Publication date: February 21, 2002Inventors: Tihu Wang, Theodore F. Ciszek
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Patent number: 6281098Abstract: A process for depositing polycrystalline silicon on substrates, including foreign substrates, occurs in a chamber at about atmospheric pressure, wherein a temperature gradient is formed, and both the atmospheric pressure and the temperature gradient are maintained throughout the process. Formation of a vapor barrier within the chamber that precludes exit of the constituent chemicals, which include silicon, iodine, silicon diiodide, and silicon tetraiodide. The deposition occurs beneath the vapor barrier. One embodiment of the process also includes the use of a blanketing gas that precludes the entrance of oxygen or other impurities. The process is capable of repetition without the need to reset the deposition zone conditions.Type: GrantFiled: June 15, 1999Date of Patent: August 28, 2001Assignee: Midwest Research InstituteInventors: Tihu Wang, Theodore F. Ciszek
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Patent number: 5544616Abstract: A liquid phase epitaxy method for forming thin crystalline layers of device quality silicon having less than 3.times.10.sup.16 Cu atoms/cc impurity, comprising: preparing a saturated liquid solution of Si in a Cu/Al solvent at about 20 to about 40 at. % Si at a temperature range of about 850.degree. to about 1100.degree. C. in an inert gas; immersing or partially immersing a substrate in the saturated liquid solution; super saturating the solution by lowering the temperature of the saturated solution; holding the substrate in the saturated solution for a period of time sufficient to cause Si to precipitate out of solution and form a crystalline layer of Si on the substrate; and withdrawing the substrate from the solution.Type: GrantFiled: May 27, 1994Date of Patent: August 13, 1996Assignee: Midwest Research InstituteInventors: Theodore F. Ciszek, Tihu Wang