Abstract: A method and device for testing an electric circuit, wherein exhaustive electric circuit modulation is not required yet circuit errors can be recognized in a reliable manner is provided. A marking signal is produced, indicating a predefined circuit state that might occur in specific components of an electric circuit, wherein a transformed network list is formed from an original network list describing the circuit, whereby all electric components of at least one predefined component group, with regard to a respective connection pair, are treated as short-circuited, all network nodes connected by one or several components that are to be treated as short-circuited are respectively combined to form an equivalence category, wherein respectively all states of the associated network nodes are assigned to each equivalence category, it is possible to determine whether and in which components the predefined circuit state can occur by taking into account the equivalence categories.

Abstract: A method and device for testing an electrical circuit, which do not require a thorough electrical circuit simulation but reliably identifying circuit faults. Preferred embodiments generate a fault signal that indicates that a given state of the circuit, which is defined by an electrical state variable, could occur in an electrical circuit. Generally, electrical components are individually treated as short-circuited or non-conducting regarding each pair of connections of the components. An electrical state variable is permanently allocated to at least one network node or a connecting pin of the electrical circuit. Electrical state variables of the network nodes and connecting pins of the components that are to be treated as short-circuited are allocated to each network node and each connecting pin. An assessment is made at least based on the allocated state variables as to whether the given circuit state can occur.

Abstract: A method for analyzing an integrated circuit (or constituent parts thereof), a computer program implementing the method, and a computer configured to execute the program is disclosed. Analyzing the integrated circuit may include retrieving a design for the integrated circuit from a layout database, identifying the bond pads and gates included in the design of the integrated circuit, determining the connections between the bond pads and the gates, and determining whether a connection between a particular gate and a particular bond pad lacks a connection segment routed over a required layer.

Abstract: A method and device for testing an electric circuit, wherein exhaustive electric circuit modulation is not required yet circuit errors can be recognized in a reliable manner is provided. A marking signal is produced, indicating a predefined circuit state that might occur in specific components of an electric circuit, wherein a transformed network list is formed from an original network list describing the circuit, whereby all electric components of at least one predefined component group, with regard to a respective connection pair, are treated as short-circuited, all network nodes connected by one or several components that are to be treated as short-circuited are respectively combined to form an equivalence category, wherein respectively all states of the associated network nodes are assigned to each equivalence category, it is possible to determine whether and in which components the predefined circuit state can occur by taking into account the equivalence categories.

Abstract: A method and device for testing an electrical circuit, which do not require a thorough electrical circuit simulation but reliably identifying circuit faults. Preferred embodiments generate a fault signal that indicates that a given state of the circuit, which is defined by an electrical state variable, could occur in an electrical circuit. Generally, electrical components are individually treated as short-circuited or non-conducting regarding each pair of connections of the components. An electrical state variable is permanently allocated to at least one network node or a connecting pin of the electrical circuit. Electrical state variables of the network nodes and connecting pins of the components that are to be treated as short-circuited are allocated to each network node and each connecting pin. An assessment is made at least based on the allocated state variables as to whether the given circuit state can occur.

Abstract: A method for processing first data representing parameters relating to several components of an electrical circuit provides an associated first data record for each component. The components of the circuit are checked against specific parameters. The parameters relate to the connection of the components to networks, or to electrical/geometric characteristics of the components. The check of the “basic rules” results in the formation of binary values. The binary values are then logically linked to check an “overall rule”. One such overall rule is, for example, the rule for checking the circuit for adequate electrostatic discharge (ESD) protection. A computer readable storage medium and a data processing system, each containing computer-executable instructions for performing the method, are provided.

Abstract: A method for processing first data representing parameters relating to several components of an electrical circuit provides an associated first data record for each component. The components of the circuit are checked against specific parameters. The parameters relate to the connection of the components to networks, or to electrical/geometric characteristics of the components. The check of the “basic rules” results in the formation of binary values. The binary values are then logically linked to check an “overall rule”. One such overall rule is, for example, the rule for checking the circuit for adequate electrostatic discharge (ESD) protection. A computer readable storage medium and a data processing system, each containing computer-executable instructions for performing the method, are provided.