Patents by Inventor Tim A. BARTSCH

Tim A. BARTSCH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Recondition process for BGA using flux
    Patent number: 10881007
    Abstract: Methods for refurbishing a circuitry device are disclosed. The methods described herein include applying a first flux to solder contacts connecting a first member of a circuitry device to a second member of the circuitry device; performing a first setting process on the circuitry device with the first flux; applying a second flux to the solder contacts of the circuitry device; performing a second setting process on the circuitry device; and reflowing the solder contacts.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: December 29, 2020
    Assignee: International Business Machines Corporation
    Inventors: Tim A. Bartsch, James D. Bielick, David J. Braun, Jennifer I. Bennett, Timothy P. Younger
  • Dye and pry process for removing quad flat no-lead packages and bottom termination components
    Patent number: 10593601
    Abstract: Embodiments of the invention include a dye and pry process for removing quad flat no-lead (QFN) packages and bottom termination components (BTC) from card assemblies. Aspects of the invention include immersing a semiconductor package assembly in a solution comprising dye and placing the immersed semiconductor package assembly under vacuum pressure. Vacuum conditions ensure that the dye solution is pulled into any cracks in the solder formed between the semiconductor package assembly and the QFN package or BTC. The package assembly is dried and a hole is drilled to expose a bottom surface of the QFN package or BTC. The QFN package or BTC is then removed by applying a force to the exposed bottom surface. The semiconductor package assembly can then be inspected for the dye to locate cracks.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: March 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tim A. Bartsch, Jennifer Bennett, James D. Bielick, David J. Braun, John R. Dangler, Stephen M. Hugo, Theron L. Lewis, Timothy P. Younger
  • DYE AND PRY PROCESS FOR REMOVING QUAD FLAT NO-LEAD PACKAGES AND BOTTOM TERMINATION COMPONENTS
    Publication number: 20190157169
    Abstract: Embodiments of the invention include a dye and pry process for removing quad flat no-lead (QFN) packages and bottom termination components (BTC) from card assemblies. Aspects of the invention include immersing a semiconductor package assembly in a solution comprising dye and placing the immersed semiconductor package assembly under vacuum pressure. Vacuum conditions ensure that the dye solution is pulled into any cracks in the solder formed between the semiconductor package assembly and the QFN package or BTC. The package assembly is dried and a hole is drilled to expose a bottom surface of the QFN package or BTC. The QFN package or BTC is then removed by applying a force to the exposed bottom surface. The semiconductor package assembly can then be inspected for the dye to locate cracks.
    Type: Application
    Filed: January 23, 2019
    Publication date: May 23, 2019
    Inventors: Tim A. Bartsch, Jennifer Bennett, James D. Bielick, David J. Braun, John R. Dangler, Stephen M. Hugo, Theron L. Lewis, Timothy P. Younger
  • Dye and pry process for removing quad flat no-lead packages and bottom termination components
    Patent number: 10262907
    Abstract: Embodiments of the invention include a dye and pry process for removing quad flat no-lead (QFN) packages and bottom termination components (BTC) from card assemblies. Aspects of the invention include immersing a semiconductor package assembly in a solution comprising dye and placing the immersed semiconductor package assembly under vacuum pressure. Vacuum conditions ensure that the dye solution is pulled into any cracks in the solder formed between the semiconductor package assembly and the QFN package or BTC. The package assembly is dried and a hole is drilled to expose a bottom surface of the QFN package or BTC. The QFN package or BTC is then removed by applying a force to the exposed bottom surface. The semiconductor package assembly can then be inspected for the dye to locate cracks.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: April 16, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tim A. Bartsch, Jennifer Bennett, James D. Bielick, David J. Braun, John R. Dangler, Stephen M. Hugo, Theron L. Lewis, Timothy P. Younger
  • RECONDITION PROCESS FOR BGA
    Publication number: 20190099817
    Abstract: Methods for refurbishing a circuitry device are disclosed. The methods described herein include applying a first flux to solder contacts connecting a first member of a circuitry device to a second member of the circuitry device; performing a first setting process on the circuitry device with the first flux; applying a second flux to the solder contacts of the circuitry device; performing a second setting process on the circuitry device; and reflowing the solder contacts.
    Type: Application
    Filed: October 4, 2017
    Publication date: April 4, 2019
    Inventors: Tim A. BARTSCH, James D. BIELICK, David J. BRAUN, Jennifer I. Bennett, Timothy P. YOUNGER