Abstract: A brushless direct-current motor is provided includes an inner stator and an outer rotor. The rotor includes a rotor core disposed around the stator, an inner annular member mounted on a rotor shaft, and a plurality of radial blades extending angularly from the rotor core to the inner annular member forming a fan. A first end cap is provided including a radial back plate proximate the fan and a center opening in the radial back plate through which the rotor shaft extends. A second end cap is provided including a main body disposed adjacent the stator opposite the fan. The radial back plate of the first end cap includes at least one sloped surface forming at least one air gap such that the airflow generated by the fan is centrifugally guided within the first end cap by the sloped surface and caused to exit through the air gap.

Abstract: A reconfigurable processor includes at least three (3) MacroSequencers (10)-(16) which are configured in an array. Each of the MacroSequencers is operable to receive on a separate one of four buses (18) an input from the other three MacroSequencers and from itself in a feedback manner. In addition, a control bus (20) is operable to provide control signals to all of the MacroSequencers for the purpose of controlling the instruction sequence associated therewith and also for inputting instructions thereto. Each of the MacroSequencers includes a plurality of executable units having inputs and outputs and each for providing an associated execution algorithm. The outputs of the execution units are input to an output selector which selects the outputs for outputs on at least one external output and on at least one feedback path. An input selector (66) is provided having an input for receiving at least one external output and at least the feedback path.

Abstract: A reconfigurable processor includes at least three (3) MacroSequencers (10)-(16) which are configured in an array. Each of the MacroSequencers is operable to receive on a separate one of four buses (18) an input from the other three MacroSequencers and from itself in a feedback manner. In addition, a control bus (20) is operable to provide control signals to all of the MacroSequencers for the purpose of controlling the instruction sequence associated therewith and also for inputting instructions thereto. Each of the MacroSequencers includes a plurality of executable units having inputs and outputs and each for providing an associated execution algorithm. The outputs of the execution units are input to an output selector which selects the outputs for outputs on at least one external output and on at least one feedback path. An input selector (66) is provided having an input for receiving at least one external output and at least the feedback path.