Patents by Inventor Tim Bossart

Tim Bossart has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060017074
    Abstract: The present invention includes a residue-free overlay target, as well as a method of forming a residue-free overlay target. The residue-free overlay target of the present invention is defined by trenches or pads including a series of raised lines. The raised lines included in the overlay target of the present invention substantially eliminate any surface topography, such as depressions, at the top surface of overlying material layers and, thereby, prevent accumulation of process residue which may obscure the overlay target and inhibit further processing. The method of the present invention may be accomplished and modified using process technology known in the semiconductor fabrication art and includes providing a semiconductor substrate, depositing a resist layer, patterning the resist, and executing a wet or dry etch to create at least one overlay target according to the present invention.
    Type: Application
    Filed: September 1, 2005
    Publication date: January 26, 2006
    Inventors: Pary Baluswamy, Scott DeBoer, Ceredig Roberts, Tim Bossart
  • Publication number: 20050070069
    Abstract: The present invention includes a residue-free overlay target, as well as a method of forming a residue-free overlay target. The residue-free overlay target of the present invention is defined by trenches or pads including a series of raised lines. The raised lines included in the overlay target of the present invention substantially eliminate any surface topography, such as depressions, at the top surface of overlying material layers and, thereby, prevent accumulation of process residue which may obscure the overlay target and inhibit further processing. The method of the present invention may be accomplished and modified using process technology known in the semiconductor fabrication art and includes providing a semiconductor substrate, depositing a resist layer, patterning the resist, and executing a wet or dry etch to create at least one overlay target according to the present invention.
    Type: Application
    Filed: November 18, 2004
    Publication date: March 31, 2005
    Inventors: Pary Baluswamy, Scott DeBoer, Ceredig Roberts, Tim Bossart
  • Patent number: 5952045
    Abstract: Disclosed is a spin coating apparatus and method for coating a semiconductor wafer of known diameter with a thin and substantially uniform coating of a solution. The apparatus comprises a containment bowl with a rotatable vacuum chuck, having a diameter less than hat of the wafer, rotatably mounted inside the bowl. The vacuum chuck captively holds a bottom surface of the wafer. Directly beneath the bottom surface of the wafer is a substantially frustroconical deflector ring. The deflector ring is concentrically attached about and stationary with respect to the rotatable vacuum chuck. The top surface of the ring is located just below and in close-spaced parallel relation to the bottom surface of the wafer. The top face of the deflector has a minimum diameter that is greater that the diameter of the semiconductor wafer. With the system of this invention the requirement of an organic solvent wash of the wafer backside after the coating of the wafer top surface is eliminated.
    Type: Grant
    Filed: October 17, 1997
    Date of Patent: September 14, 1999
    Assignee: Micron Technology, Inc.
    Inventor: Tim Bossart