Patents by Inventor Tim Damon
Tim Damon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7464308Abstract: A CAM device that performs operations on-chip during testing. The CAM device can, for example, include circuitry that compares search results with an expected address to determine whether the expected address is defective. The CAM can be tested by applying search data and the expected address to the CAM at the same time, and determining if a match occurs at the expected address. In another approach, a reset match enable is used to limit the search to only a CAM memory location that has been written to, thereby limiting the test search to only the location containing test data.Type: GrantFiled: January 13, 2004Date of Patent: December 9, 2008Assignee: Micron Technology, Inc.Inventor: Tim Damon
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Publication number: 20050166102Abstract: A CAM device that performs operations on-chip during testing. The CAM device can, for example, include circuitry that compares search results with an expected address to determine whether the expected address is defective. The CAM can be tested by applying search data and the expected address to the CAM at the same time, and determining if a match occurs at the expected address. In another approach, a reset match enable is used to limit the search to only a CAM memory location that has been written to, thereby limiting the test search to only the location containing test data.Type: ApplicationFiled: January 13, 2004Publication date: July 28, 2005Inventor: Tim Damon
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Patent number: 6762608Abstract: A voltage is applied across a control resistor, and the voltage is caused to decay. The decay is monitored by a testing circuit such as a comparator. When the voltage across the control resistor has decayed to a value less than or equal to a reference voltage in the comparator, a switch time period is established. Fuses in a memory device are tested against the established switch time period. The fuses are tested in a similar fashion: a voltage is applied across the fuse being tested, and the voltage is caused to decay. The comparator monitors the decay of the voltage across the fuse. If the resistance value of a fuse being tested is within specification, the comparator changes its state at a time equal to or less than the switch time period established for the control resistor. Testing time for fuses can further be minimized by having an external access to the reference in the comparator.Type: GrantFiled: June 25, 2002Date of Patent: July 13, 2004Assignee: Micron Technology, Inc.Inventors: Tim Damon, Phillip E. Byrd
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Publication number: 20020163343Abstract: A voltage is applied across a control resistor, and the voltage is caused to decay. The decay is monitored by a testing circuit such as a comparator. When the voltage across the control resistor has decayed to a value less than or equal to a reference voltage in the comparator, a switch time period is established. Fuses in a memory device are tested against the established switch time period. The fuses are tested in a similar fashion: a voltage is applied across the fuse being tested, and the voltage is caused to decay. The comparator monitors the decay of the voltage across the fuse. If the resistance value of a fuse being tested is within specification, the comparator changes its state at a time equal to or less than the switch time period established for the control resistor. Testing time for fuses can further be minimized by having an external access to the reference in the comparator.Type: ApplicationFiled: June 25, 2002Publication date: November 7, 2002Applicant: Micron Technology, Inc.Inventors: Tim Damon, Phillip E. Byrd
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Patent number: 6424161Abstract: A voltage is applied across a control resistor, and the voltage is caused to decay. The decay is monitored by a testing circuit such as a comparator. When the voltage across the control resistor has decayed to a value less than or equal to a reference voltage in the comparator, a switch time period is established. Fuses in a memory device are tested against the established switch time period. The fuses are tested in a similar fashion: a voltage is applied across the fuse being tested, and the voltage is caused to decay. The comparator monitors the decay of the voltage across the fuse. If the resistance value of a fuse being tested is within specification, the comparator changes its state at a time equal to or less than the switch time period established for the control resistor. Testing time for fuses can further be minimized by having an external access to the reference in the comparator.Type: GrantFiled: September 3, 1998Date of Patent: July 23, 2002Assignee: Micron Technology, Inc.Inventors: Tim Damon, Phillip E. Byrd
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Patent number: 6410352Abstract: A voltage is applied across a control resistor, and the voltage is caused to decay. The decay is monitored by a testing circuit such as a comparator. When the voltage across the control resistor has decayed to a value less than or equal to a reference voltage in the comparator, a switch time period is established. Fuses in a memory device are tested against the established switch time period. The fuses are tested in a similar fashion: a voltage is applied across the fuse being tested, and the voltage is caused to decay. The comparator monitors the decay of the voltage across the fuse. If the resistance value of a fuse being tested is within specification, the comparator changes its state at a time equal to or less than the switch time period established for the control resistor. Testing time for fuses can further be minimized by having an external access to the reference in the comparator.Type: GrantFiled: May 14, 2001Date of Patent: June 25, 2002Assignee: Micron Technology, Inc.Inventors: Tim Damon, Phillip E. Byrd
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Publication number: 20020003425Abstract: A voltage is applied across a control resistor, and the voltage is caused to decay. The decay is monitored by a testing circuit such as a comparator. When the voltage across the control resistor has decayed to a value less than or equal to a reference voltage in the comparator, a switch time period is established. Fuses in a memory device are tested against the established switch time period. The fuses are tested in a similar fashion: a voltage is applied across the fuse being tested, and the voltage is caused to decay. The comparator monitors the decay of the voltage across the fuse. If the resistance value of a fuse being tested is within specification, the comparator changes its state at a time equal to or less than the switch time period established for the control resistor. Testing time for fuses can further be minimized by having an external access to the reference in the comparator.Type: ApplicationFiled: September 3, 1998Publication date: January 10, 2002Inventors: TIM DAMON, PHILLIP E. BYRD
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Publication number: 20010034070Abstract: A voltage is applied across a control resistor, and the voltage is caused to decay. The decay is monitored by a testing circuit such as a comparator. When the voltage across the control resistor has decayed to a value less than or equal to a reference voltage in the comparator, a switch time period is established. Fuses in a memory device are tested against the established switch time period. The fuses are tested in a similar fashion: a voltage is applied across the fuse being tested, and the voltage is caused to decay. The comparator monitors the decay of the voltage across the fuse. If the resistance value of a fuse being tested is within specification, the comparator changes its state at a time equal to or less than the switch time period established for the control resistor. Testing time for fuses can further be minimized by having an external access to the reference in the comparator.Type: ApplicationFiled: May 14, 2001Publication date: October 25, 2001Applicant: Micron Technology, Inc.Inventors: Tim Damon, Phillip E. Byrd
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Patent number: 6256593Abstract: A system is disclosed for evaluating relevant data across independent test sequences and providing a consumable output to give a tester an accurate account of the test data. A method for reporting the results of the test processes includes several steps. First, repair, trending, characterization, timing and engineering data for two separate test sequences are read. Next, the data is compared. Also, an analytical report of the test data comparisons is assembled and output.Type: GrantFiled: February 24, 2000Date of Patent: July 3, 2001Assignee: Micron Technology Inc.Inventors: Tim Damon, Blane Holden, Matt Adsitt, Dan Dean, Mike Pearson
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Patent number: 6070131Abstract: A system is disclosed for evaluating relevant data across independent test sequences and providing a consumable output to give a tester an accurate account of the test data. A method for reporting the results of the test processes includes several steps. First, repair, trending, characterization, timing and engineering data for two separate test sequences are read. Next, the data is compared. Also, an analytical report of the test data comparisons is assembled and output.Type: GrantFiled: September 26, 1997Date of Patent: May 30, 2000Assignee: Micron Technology, Inc.Inventors: Tim Damon, Blane Holden, Matt Adsitt, Dan Dean, Mike Pearson