Patents by Inventor Tim Frodsham

Tim Frodsham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130187552
    Abstract: The current application is directed to control of lighting systems and utilization of ambient light levels for such control. One implementation comprises one or more lighting fixtures installed in a structure, at least one ambient light information source configured to provide brightness information of ambient light of the structure, and a controller configured to maintain a brightness level of an interior portion of the structure substantially the same as a brightness level of an exterior portion of the structure by controlling outputs of the lighting fixtures in response to the brightness information of the ambient light. The interior portion of the structure may include an entrance portion of the structure. The controller may be further configured to gradually reduce brightness levels of the outputs of the lighting fixtures from the entrance portion towards a center of the structure.
    Type: Application
    Filed: March 12, 2013
    Publication date: July 25, 2013
    Inventors: Tim Frodsham, Mark VanWagoner, Joseph E. Herbst
  • Patent number: 8250416
    Abstract: Redundant acknowledgment between agents performing a loopback test over bidirectional communications bus is described. In one example, in a processor including a communications agent coupled to a bidirectional communications bus, the communications agent initiates loopback communications to a second agent, sends a packet including a redundant acknowledgment sequence to the second agent, receives the packet including the redundant acknowledgement sequence looped back from the second agent, determines whether the received redundant acknowledgment sequence is valid, sends a test sequence to the second agent, receives the test sequence looped back, and if the received redundant acknowledgment sequence is determined to be valid, then checks the received test sequence.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: August 21, 2012
    Assignee: Intel Corporation
    Inventors: Tim Frodsham, Zale Schoenborn, Sanjay Dabral, Muraleedhara Navada
  • Patent number: 8205111
    Abstract: In one embodiment, the present invention includes a method for writing data from a writer coupled to a reader via an in-die interconnect into a queue entry according to a first clock of the writer, generating a mapping of which second clocks of the reader that the reader is allowed to read from the queue, based at least in part on the first and second clocks, and reading the data from the entry at an allowed second clock. Other embodiments are described and claimed.
    Type: Grant
    Filed: January 2, 2009
    Date of Patent: June 19, 2012
    Assignee: Intel Corporation
    Inventors: David L. Hill, Robert J. Greiner, Tim Frodsham, Derek Bachand, Anant Deval, Mark Waggoner
  • Patent number: 8204067
    Abstract: A technique to perform virtualization of lanes within a common system interface (CSI) link. More particularly, embodiments described herein relate to virtualizing interconnective paths between two or more electronic devices residing in an electronic network.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: June 19, 2012
    Assignee: Intel Corporation
    Inventors: Naveen Cherukuri, Jeffrey R. Wilcox, Sanjay Dabral, David S. Dunning, Tim Frodsham, Theodore Z. Schoenborn
  • Publication number: 20120011276
    Abstract: Systems and methods of managing a link provide for receiving a remote width capability during a link initialization, the remote width capability corresponding to a remote port. A link between a local port and the remote port is operated at a plurality of link widths in accordance with the remote width capability.
    Type: Application
    Filed: September 22, 2011
    Publication date: January 12, 2012
    Inventors: Naveen Cherukuri, Aaron T. Spink, Phanindra Mannaya, Tim Frodsham, Jeffrey R. Wilcox, Sanjay Dabral, David Dunning, Theodore Z. Schoenborn
  • Patent number: 8046488
    Abstract: Systems and methods of managing a link provide for receiving a remote width capability during a link initialization, the remote width capability corresponding to a remote port. A link between a local port and the remote port is operated at a plurality of link widths in accordance with the remote width capability.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: October 25, 2011
    Assignee: Intel Corporation
    Inventors: Naveen Cherukuri, Aaron T. Spink, Phanindra Mannava, Tim Frodsham, Jeffrey R. Wilcox, Sanjay Dabral, David Dunning, Theodore Z. Schoenborn
  • Patent number: 7965741
    Abstract: A predetermined network packet is utilized for power reduction in either or both of a transmitter and receiver when information is not needed. Upon detection of the predetermined network packet type, various portions of the transmitter and/or receiver may be clock gated or powered down.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: June 21, 2011
    Assignee: Intel Corporation
    Inventors: Tim Frodsham, Naveen Cherukuri, Sanjay Darbal, David S. Dunning, Theodore Z. Schoenborn, Lakshminarayan Krishnamurty, Aaron T. Spink
  • Patent number: 7957428
    Abstract: Embodiments of the invention provide an algorithm for dividing a link into one or more reduced-width links. For one embodiment of the invention, a multiplexing scheme is employed to effect a bit transmission order required by a particular cyclic redundancy check. The multiplexed output bits are then swizzled on-chip to reduce on-board routing congestion.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: June 7, 2011
    Assignee: Intel Corporation
    Inventors: Maurice B. Steinman, Rahul R. Shah, Naveen Cherukuri, Aaron T. Spink, Allen J. Baum, Sanjay Dabral, Tim Frodsham, David S. Dunning, Theodore Z. Schoenborn
  • Publication number: 20100330927
    Abstract: Methods and apparatus relating to link power savings with state retention are described. In one embodiment, one or more components of two agents coupled via a serial link are turned off during idle periods while retaining link state in each agent. Other embodiments are also disclosed.
    Type: Application
    Filed: June 30, 2009
    Publication date: December 30, 2010
    Inventors: Naveen Cherukuri, Jeffrey Wilcox, Venkatraman Iyer, Selim Bilgin, David D. Dunning, Robin Tim Frodsham, Theodore Z. Schoenborn, Sanjay Dabral
  • Patent number: 7844767
    Abstract: A technique is described by which two link agents with ports coupled together using a point-to-point interconnect in a system exchange their link width support capabilities and negotiate a link width that is mutually agreeable. The interconnect between each pair of agents comprises a pair of uni-directional links having multiple electrical wires, or lanes, where one link is used by a first agent to transmit data to a second agent and another link is used by the second agent to transmit data to the first agent.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: November 30, 2010
    Assignee: Intel Corporation
    Inventors: Naveen Cherukuri, Sanjay Dabral, David S. Dunning, Tim Frodsham, Theodore Z. Schoenborn, Rahul R. Shah, Maurice B. Steinman
  • Patent number: 7804890
    Abstract: A discussion of improving integrated device deterministic response to test vectors. For example, limiting the transmission delay for an integrated device's response within known bounds by synchronizing an initialization training sequence to a reset deassertion. Specifically, the proposal facilitates response determinism from the DUT by synchronizing training sequences and subsequently synchronizing flit transmission to reset assertion as sampled by reference clock.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: September 28, 2010
    Assignee: Intel Corporation
    Inventors: Muraleedhara H. Navada, Tim Frodsham, Sanjay Dabral, Allen Baum, Chris D. Matthews, Chris C. Gianos, Rahul R. Shah, Theodore Z. Schoenborn
  • Publication number: 20100174936
    Abstract: In one embodiment, the present invention includes a method for writing data from a writer coupled to a reader via an in-die interconnect into a queue entry according to a first clock of the writer, generating a mapping of which second clocks of the reader that the reader is allowed to read from the queue, based at least in part on the first and second clocks, and reading the data from the entry at an allowed second clock. Other embodiments are described and claimed.
    Type: Application
    Filed: January 2, 2009
    Publication date: July 8, 2010
    Inventors: David L. Hill, Robert J. Greiner, Tim Frodsham, Derek Bachand, Anant Deval, Mark Waggoner
  • Patent number: 7747888
    Abstract: A technique for promoting determinism among bus agents within a point-to-point (PtP) network. More particularly, embodiments of the invention relate to techniques to compensate for link latency, data skew, and clock shift within a PtP network of common system interface (CSI) bus agents.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: June 29, 2010
    Assignee: Intel Corporation
    Inventors: Tim Frodsham, Michael J. Tripp, David J. O'Brien, Muraleedhara Navada, Naveen Cherukuri, Sanjay Dabral, David S. Dunning, Theodore Z. Schoenborn
  • Patent number: 7746795
    Abstract: A loopback test to test a communication link for a layered interface where in a master agent programs the electrical parameters for the slave agent, such as, the offset, timing, and current compensation with a loopback control register.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: June 29, 2010
    Assignee: Intel Corporation
    Inventors: Tim Frodsham, Naveen Cherukuri, Sanjay Dabral, David S. Dunning, Theodore Z. Schoenborn, Lakshminarayan Krishnamurty
  • Patent number: 7711878
    Abstract: A method and apparatus for advancing initialization messages when initializing an interface is presented. In one embodiment, one of a sequence of training sequence messages are sent in serial mode across the data lanes of a generally-parallel interface between two agents. When one agent correctly receives a fixed number of messages, it may begin sending its messages with an acknowledgement. Thereafter, when that agent correctly receives a fixed number of messages including an acknowledgement, that agent may advance to sending the next training sequence messages in the sequence.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: May 4, 2010
    Assignee: Intel Corporation
    Inventors: Naveen Cherukuri, Sanjay Dabral, David S. Dunning, Tim Frodsham, Theodore Z. Schoenborn
  • Publication number: 20100103826
    Abstract: Redundant acknowledgment between agents performing a loopback test over bidirectional communications bus is described. In one example, in a processor including a communications agent coupled to a bidirectional communications bus, the communications agent initiates loopback communications to a second agent, sends a packet including a redundant acknowledgment sequence to the second agent, receives the packet including the redundant acknowledgement sequence looped back from the second agent, determines whether the received redundant acknowledgment sequence is valid, sends a test sequence to the second agent, receives the test sequence looped back, and if the received redundant acknowledgment sequence is determined to be valid, then checks the received test sequence.
    Type: Application
    Filed: December 30, 2009
    Publication date: April 29, 2010
    Inventors: Tim Frodsham, Zale Schoenborn, Sanjay Dabral, Muraleedhara Navada
  • Patent number: 7681093
    Abstract: Redundant acknowledgment between agents performing a loopback test over bidirectional communications bus is described. In one example the acknowledgment is performed by initiating loopback communications from a first agent to a second agent, sending a packet including a redundant acknowledgment sequence from the first agent to the second agent, receiving the packet including the redundant acknowledgement sequence looped back from the second agent at the first agent, sending a test sequence from the first agent to the second agent, and receiving the test sequence looped back from the first agent.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: March 16, 2010
    Assignee: Intel Corporation
    Inventors: Tim Frodsham, Zale Schoenborn, Sanjay Dabral, Muraleedhara Navada
  • Publication number: 20100027564
    Abstract: A predetermined network packet is utilized for power reduction in either or both of a transmitter and receiver when information is not needed. Upon detection of the predetermined network packet type, various portions of the transmitter and/or receiver may be clock gated or powered down.
    Type: Application
    Filed: July 29, 2009
    Publication date: February 4, 2010
    Inventors: Tim Frodsham, Naveen Cherukuri, Sanjay Darbal, David S. Dunning, Theodore Z. Schoenborn, Lakshminarayan Krishnamurty, Aaron T. Spink
  • Patent number: 7610500
    Abstract: Disclosed are embodiments of a method, apparatus and system for a low power state for a point-to-point link. During the low power state, the signal on both conductors of a differential transmit pair are driven to electrical idle. Analog activity detectors are enabled during the low power state and are disabled during normal power state. Exit from the low power state does not require a physical layer re-initialization sequence. Other embodiments are also described and claimed.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: October 27, 2009
    Assignee: Intel Corporation
    Inventors: Naveen Cherukuri, Jeffrey R. Wilcox, Sanjay Dabral, Phanindra K. Mannava, Aaron T. Spink, David S. Dunning, Tim Frodsham, Theodore Z. Schoenborn
  • Patent number: 7586951
    Abstract: A predetermined network packet is utilized for power reduction in either or both of a transmitter and receiver when information is not needed. Upon detection of the predetermined network packet type, various portions of the transmitter and/or receiver may be clock gated or powered down.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: September 8, 2009
    Assignee: Intel Corporation
    Inventors: Tim Frodsham, Naveen Cherukuri, Sanjay Darbal, David S. Dunning, Theodore Z. Schoenborn, Lakshminarayan Krishnamurty, Aaron T. Spink