Abstract: A phase/frequency detector to detect the phase/frequency difference between two signals comprises a first bistable circuit to produce a first output pulse in response to one of the two signals; a second bistable circuit to produce a second output pulse in response to the other of the two signals; a gate circuit coupled to the first and second bistable circuits responsive to the first and second output pulses to produce a reset pulse to reset the first and second bistable circuits after a predetermined time delay. A first circuit arrangement is coupled to the first bistable circuit and the gate circuit to reduce the width of the first output pulse and a second circuit arrangement is coupled to the second bistable circuit and the gate circuit to reduce the width of and invert the second output pulse. The second circuit arrangement includes a third circuit arrangement to equalize turn on and turn off times of the reduced width first output pulse and the reduced width second output pulse.