Patents by Inventor Tim Schonauer

Tim Schonauer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9443583
    Abstract: A memory device includes a multi gate field effect transistor (MuGFET) having a fin with a contact area. A programmable memory element abuts the fin contact area.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: September 13, 2016
    Assignee: Infineon Technologies AG
    Inventors: Christian Pacha, Tim Schönauer, Michael Kund
  • Publication number: 20120026781
    Abstract: A memory device includes a multi gate field effect transistor (MuGFET) having a fin with a contact area. A programmable memory element abuts the fin contact area.
    Type: Application
    Filed: October 11, 2011
    Publication date: February 2, 2012
    Applicant: Infineon Technologies AG
    Inventors: Christian Pacha, Tim Schönauer, Michael Kund
  • Patent number: 8063448
    Abstract: A memory device includes a multi gate field effect transistor (MuGFET) having a fin with a contact area. A programmable memory element abuts the fin contact area.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: November 22, 2011
    Assignee: Infineon Technologies AG
    Inventors: Christian Pacha, Tim Schönauer, Michael Kund
  • Publication number: 20090275299
    Abstract: A method and device for transmitting audio data and text data to an RDS capable radio receiver by a wireless device is disclosed. The device includes a receiver for scanning a frequency range to detect an available radio frequency based on predetermined criteria. The device also includes a transmitter for transmitting data on a detected frequency that comprises RDS message data. Other systems and methods are also disclosed.
    Type: Application
    Filed: April 30, 2008
    Publication date: November 5, 2009
    Applicant: Infineon Technologies AG
    Inventors: Steffen Buch, Stefan van Waasen, Tim Schonauer, Jurgen Wondra
  • Publication number: 20080224178
    Abstract: A memory device includes a multi gate field effect transistor (MuGFET) having a fin with a contact area. A programmable memory element abuts the fin contact area.
    Type: Application
    Filed: March 16, 2007
    Publication date: September 18, 2008
    Applicants: INFINEON TECHNOLOGIES, QIMONDA AGGUSTAV
    Inventors: Christian Pacha, Tim Schonauer, Michael Kund
  • Publication number: 20070247196
    Abstract: A circuit and method for configuring a circuit is disclosed. In one embodiment, the circuit includes at least one pull-down path, wherein an amount of a current flowing through the pull-down path is determined by a switchable resistivity value of a switchable resistor that is included by the circuit. The invention further provides method for configuring a circuit and to a logic circuit.
    Type: Application
    Filed: April 7, 2006
    Publication date: October 25, 2007
    Inventors: Thomas Niedermeier, Tim Schonauer
  • Patent number: 7279936
    Abstract: A logic basic cell, a logic basic cell arrangement, and a logic device. A logic basic cell is provided for forming a logic combination of two data signals in accordance with a logic function that can be selected by means of a plurality of logic selection elements, having four data signal inputs, to which two data signals and the logically complementary data signals thereof can be applied, and having six logic selection elements between the data signal inputs. At a data signal output, the logic combination of the two data signals in accordance with the logic function selected by means of the logic selection elements can be provided as output signal.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: October 9, 2007
    Assignee: Infineon Technologies AG
    Inventors: Jörg Gliese, Tim Schönauer
  • Publication number: 20050253625
    Abstract: A logic basic cell, a logic basic cell arrangement, and a logic device. A logic basic cell is provided for forming a logic combination of two data signals in accordance with a logic function that can be selected by means of a plurality of logic selection elements, having four data signal inputs, to which two data signals and the logically complementary data signals thereof can be applied, and having six logic selection elements between the data signal inputs. At a data signal output, the logic combination of the two data signals in accordance with the logic function selected by means of the logic selection elements can be provided as output signal.
    Type: Application
    Filed: December 7, 2004
    Publication date: November 17, 2005
    Applicant: Infineon Technologies AG
    Inventors: Jorg Gliese, Tim Schonauer