Patents by Inventor Tim Short

Tim Short has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120152835
    Abstract: In some aspects, the disclosure provides methods and materials for generating electrical energy from wastewater treatment materials. For example, the methods involve selecting a pair of materials from a wastewater treatment facility and forming a microbial fuel cell using the pair of materials as anode and cathode materials. There are provided various configurations suitable for adaptation to existing wastewater treatment facilities, as well as design parameters for new wastewater treatment facilities, devices, or schemes that take advantage of the methods of the disclosure.
    Type: Application
    Filed: December 16, 2011
    Publication date: June 21, 2012
    Inventors: Andres Cardenas, Toler Strawn, Tim Short, Walter McCracken, Larry Langebrake
  • Publication number: 20060168485
    Abstract: In a pipeline architecture, an instruction fault status register (FSR) is used to save the reason for a fault between the time an instruction is fetched and when it is executed. Sequential faults for different reasons cause an overwrite of the FSR and invalid abort codes upon the execution of an instruction. This method and system of updating the FSR passes the abort code with the instruction through the pipeline to the execute stage where the FSR is updated.
    Type: Application
    Filed: January 26, 2005
    Publication date: July 27, 2006
    Inventors: Zihno Jusufovic, William Miller, Tim Short
  • Patent number: 5684948
    Abstract: A memory management unit provides security functions for a processor which has no specialized hardware support for a memory management unit. An exception security system is provided for use with an exception-capable processor. In an unsecure mode, the processor responds to an exception by retrieving unprotected exception information from generally accessible exception information register circuitry and executes an exception processing routine indicated by the unprotected exception information. Secure exception information register circuitry is provided in the memory management unit that holds a protected copy of exception information.
    Type: Grant
    Filed: September 1, 1995
    Date of Patent: November 4, 1997
    Assignee: National Semiconductor Corporation
    Inventors: James Scott Johnson, Tim Short, Gideon Intrater