Patents by Inventor Tim VOGT
Tim VOGT has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260158567Abstract: A work apparatus includes a cutting disk driven by a drive motor, a protective hood covering the disk around a portion of its circumference and which is adjustable by the user in an opening direction and a closing direction, a device for detecting the hood position, and a control unit. The control unit operates the work apparatus in a first operating mode and in a second operating mode and, depending on the hood position detected, to switch from the first into the second operating mode upon adjustment of the hood in the opening direction and to switch from the second into the first operating mode upon adjustment of the hood in the closing direction. The switch from the first into the second operating mode occurs with the hood in a first position. The switch from the second into the first operating mode occurs with the hood in a second position.Type: ApplicationFiled: December 8, 2025Publication date: June 11, 2026Inventors: Tim Vogt, Alexander Berger, Johannes Alber, Christopher Tost
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Patent number: 12445132Abstract: Various techniques are provided to implement cryptographic hardware sharing systems and methods. In one example, a programmable logic device (PLD) includes a configuration engine configured to provide configuration data for processing using a first set of security functions. The PLD further includes a PLD fabric including an array of memory cells configured to operate upon being programmed using the configuration data and provide user data for processing using a second set of security functions. The PLD further includes a security engine including a cryptographic circuit and an interface integration logic circuit. The logic circuit is configured to selectively couple, based on an indicator, the configuration engine or PLD fabric to the cryptographic circuit. The cryptographic circuit is configured to perform the first set or second set of security functions when coupled to the configuration engine or PLD fabric, respectively, by the logic circuit. Related systems and methods are provided.Type: GrantFiled: November 30, 2023Date of Patent: October 14, 2025Assignee: Lattice Semiconductor CorporationInventors: Tim Vogt, Mark Everhard, Narasimhakumar Mangipudi
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Publication number: 20250315536Abstract: Various techniques are provided to implement parallel processing systems and methods for facilitating bitstream security. In one example, a method includes receiving a bitstream, a signature associated with the bitstream, predetermined authentication data associated with the bitstream, and a public key associated with a provider of the bitstream. The method further includes verifying the signature based on the predetermined authentication data. The method further includes computing authentication data based on the bitstream and verifying the predetermined authentication data based on the computed authentication data. The method further includes determining an integrity associated with content of the bitstream. The method further includes performing a mitigation action when the signature verification result indicates an unsuccessful authentication, the authentication data verification result indicates an unsuccessful authentication, and/or an integrity result indicates a failed integrity check.Type: ApplicationFiled: April 5, 2024Publication date: October 9, 2025Inventor: Tim Vogt
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Patent number: 12417319Abstract: Various techniques are provided to implement multi-chip secure and programmable systems and methods. In one example, a multi-chip module system for providing an integrated programmable logic functionality and security functionality. The multi-chip module system includes a first die including a programmable logic device (PLD) configured to provide at least a portion of the programmable logic functionality. The multi-chip system further includes a second die including a security engine configured to perform at least a portion of the security functionality. The security engine is further configured to receive, from the first die, data associated with a first and second configuration image; perform a read operation on a memory for the second configuration image based on the data; and authenticate the second configuration image. The multi-chip system further includes a configuration engine configured to program the PLD according to the first configuration image. Related devices and methods are provided.Type: GrantFiled: June 7, 2023Date of Patent: September 16, 2025Assignee: Lattice Semiconductor CorporationInventors: Srirama Chandra, Tim Vogt, Mamta Gupta, Sharath Raghava
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Publication number: 20240385848Abstract: Various techniques are provided for configuring clients of a programmable logic device (PLD). In one embodiment, a method includes passing, from a configuration engine of a PLD, a plurality of transactions to clients of the PLD over a pipeline of the PLD. The method also includes executing each of the transactions by one or more of the clients. A first one of the transactions is a read transaction that causes at least a first one of the clients to retrieve read data and pass the read data over the pipeline. The method also includes passing the read data over the pipeline to the configuration engine. Additional systems and methods are also provided.Type: ApplicationFiled: May 16, 2024Publication date: November 21, 2024Inventors: Tim Vogt, Kory Gong, Chunhua Zan, Henry Tso
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Publication number: 20240187001Abstract: Various techniques are provided to implement cryptographic hardware sharing systems and methods. In one example, a programmable logic device (PLD) includes a configuration engine configured to provide configuration data for processing using a first set of security functions. The PLD further includes a PLD fabric including an array of memory cells configured to operate upon being programmed using the configuration data and provide user data for processing using a second set of security functions. The PLD further includes a security engine including a cryptographic circuit and an interface integration logic circuit. The logic circuit is configured to selectively couple, based on an indicator, the configuration engine or PLD fabric to the cryptographic circuit. The cryptographic circuit is configured to perform the first set or second set of security functions when coupled to the configuration engine or PLD fabric, respectively, by the logic circuit. Related systems and methods are provided.Type: ApplicationFiled: November 30, 2023Publication date: June 6, 2024Inventors: Tim Vogt, Mark Everhard, Narasimhakumar Mangipudi
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Patent number: 11835540Abstract: A method includes a) operating an inertial sensor device arranged on or in a mobile motor-driven processing device in a motion-monitoring operating mode to monitor whether an inertial variable or a variable based on the inertial variable fulfills a motion criterion, wherein the motion criterion is characteristic of a motion of the processing device, b) if the motion criterion is fulfilled, operating the inertial sensor device in a shock and/or impact-monitoring operating mode to monitor whether the inertial variable or a variable based on the inertial variable fulfills a shock and/or impact criterion, wherein the shock and/or impact criterion is characteristic of an atypical motion of the processing device, and c) if the shock and/or impact criterion is fulfilled, transmitting an information signal via the inertial sensor device and operating the control device as a function of the transmitted information signal.Type: GrantFiled: November 12, 2021Date of Patent: December 5, 2023Assignee: Andreas Stihl AG & Co. KGInventors: Simon Trinkle, Tim Vogt, Mario Buser
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Publication number: 20230315913Abstract: Various techniques are provided to implement multi-chip secure and programmable systems and methods. In one example, a multi-chip module system for providing an integrated programmable logic functionality and security functionality. The multi-chip module system includes a first die including a programmable logic device (PLD) configured to provide at least a portion of the programmable logic functionality. The multi-chip system further includes a second die including a security engine configured to perform at least a portion of the security functionality. The security engine is further configured to receive, from the first die, data associated with a first and second configuration image; perform a read operation on a memory for the second configuration image based on the data; and authenticate the second configuration image. The multi-chip system further includes a configuration engine configured to program the PLD according to the first configuration image. Related devices and methods are provided.Type: ApplicationFiled: June 7, 2023Publication date: October 5, 2023Inventors: Srirama Chandra, Tim Vogt, Mamta Gupta, Sharath Raghava
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Publication number: 20230297079Abstract: Various techniques are provided to implement back-end processing systems and methods for device identification. In one example, a method includes receiving fabrication data associated with a die element. The die element has an integrated circuit fabricated according to a design defined by a mask set. The method further includes creating, by the integrated circuit, a seed value based on a characteristic of the integrated circuit. The method further includes producing, by the integrated circuit, an identifier for the die element based on the fabrication data and the seed value. Related devices and systems are provided.Type: ApplicationFiled: March 15, 2023Publication date: September 21, 2023Inventors: Narasimhakumar Mangipudi, Tim Vogt
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Publication number: 20220155333Abstract: A method operates a device arranged on or in a mobile motor-driven processing device, wherein the device has an inertial sensor device with at least one inertial sensor formed for detecting an inertial variable and a control device.Type: ApplicationFiled: November 12, 2021Publication date: May 19, 2022Inventors: Simon TRINKLE, Tim VOGT, Mario BUSER