Patents by Inventor Timmy Lok

Timmy Lok has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for increasing efficiency and controlling slew rate in DC-DC converters
    Patent number: 10326365
    Abstract: One embodiment pertains to a method including transitioning a logic state of at least one enable signal. A first power transistor begins to turn off. A parameter level of the input of the first power transistor is directly sensed. A second power transistor is turned off when the parameter level is less than a threshold level.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: June 18, 2019
    Assignee: Intersil Americas LLC
    Inventors: Alexandro Leoncini, Edward Kohler, Timmy Lok
  • METHOD AND SYSTEM FOR INCREASING EFFICIENCY AND CONTROLLING SLEW RATE IN DC-DC CONVERTERS
    Publication number: 20180145591
    Abstract: One embodiment pertains to a method including transitioning a logic state of at least one enable signal. A first power transistor begins to turn off. A parameter level of the input of the first power transistor is directly sensed. A second power transistor is turned off when the parameter level is less than a threshold level.
    Type: Application
    Filed: November 2, 2017
    Publication date: May 24, 2018
    Applicant: Intersil Americas LLC
    Inventors: Alexandro Leoncini, Edward Kohler, Timmy Lok
  • Method and system for increasing efficiency and controlling slew rate in DC-DC converters
    Patent number: 9812962
    Abstract: One embodiment pertains to a method including transitioning a logic state of at least one enable signal. A first power transistor begins to turn off. A parameter level of the input of the first power transistor is directly sensed. A second power transistor is turned off when the parameter level is less than a threshold level.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: November 7, 2017
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Alexandro Leoncini, Edward Kohler, Timmy Lok
  • Method and System for Increasing Efficiency and Controlling Slew Rate in DC-DC Converters
    Publication number: 20170093283
    Abstract: One embodiment pertains to a method including transitioning a logic state of at least one enable signal. A first power transistor begins to turn off. A parameter level of the input of the first power transistor is directly sensed. A second power transistor is turned off when the parameter level is less than a threshold level.
    Type: Application
    Filed: April 5, 2016
    Publication date: March 30, 2017
    Inventors: Alexandro Leoncini, Edward Kohler, Timmy Lok