Patents by Inventor Timo Mueller
Timo Mueller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12497710Abstract: A semiconductor single-crystal silicon, is produced from a silicon substrate wafer containing interstitial oxygen in a concentration of more than 5×1016 AT/cm3 (new ASTM) by an RTA treatment of the wafer in a first heat treatment at a first temperature in a temperature range of not less than 1200° C. and not more than 1260° C. for a period of not less than 5 s and not more than 30 s, where the front side of the substrate wafer is exposed to an atmosphere containing argon; a second heat treatment at a second temperature in a temperature range of not less than 1150° C. and not more than 1190° C. for a period of not less than 15 s and not more than 20 s, where the front side of the wafer is exposed to an argon and ammonia, atmosphere, and a third heat treatment at a third temperature in a temperature range of not less than 1160° C. and not more than 1190° C. for a period of not less than 20 s and not more than 30 s, where the front side of the wafer is exposed to an atmosphere containing argon.Type: GrantFiled: June 10, 2021Date of Patent: December 16, 2025Assignee: Siltronic AGInventors: Michael Gehmlich, Gudrun Kissinger, Karl Mangelberger, Timo Mueller, Michael Skrobanek
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Publication number: 20250129506Abstract: A semiconductor wafer of monocrystalline silicon is produced, in the following order: growing a single crystal of silicon by the CZ method; dividing off a wafer consisting completely of an N region, in which there are no agglomerates of silicon interstitials or vacancies having a diameter of more than 20 nm, and has an oxygen concentration of not less than 5.3×1017 atoms/cm3 and not more than 5.9×1017 atoms/cm3 and a nitrogen concentration of not more than 1.0×1012 atoms/cm3; executing a three separate rapid thermal annealing (RTA) treatments of the wafer at temperatures within different temperature ranges over different time periods in a different atmospheres of argon with and without ammonia.Type: ApplicationFiled: September 5, 2022Publication date: April 24, 2025Inventors: Timo MUELLER, Michael BOY, Michael GEHMLICH, Gudrun KISSINGER, Dawid KOT
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Publication number: 20230243069Abstract: A semiconductor single-crystal silicon, is produced from a silicon substrate wafer containing interstitial oxygen in a concentration of more than 5 × 1016 AT/cm3 (new ASTM) by an RTA treatment of the wafer in a first heat treatment at a first temperature in a temperature range of not less than 1200° C. and not more than 1260° C. for a period of not less than 5 s and not more than 30 s, where the front side of the substrate wafer is exposed to an atmosphere containing argon; a second heat treatment at a second temperature in a temperature range of not less than 1150° C. and not more than 1190° C. for a period of not less than 15 s and not more than 20 s, where the front side of the wafer is exposed to an argon and ammonia, atmosphere, and a third heat treatment at a third temperature in a temperature range of not less than 1160° C. and not more than 1190° C. for a period of not less than 20 s and not more than 30 s, where the front side of the wafer is exposed to an atmosphere containing argon.Type: ApplicationFiled: June 10, 2021Publication date: August 3, 2023Applicant: SILTRONIC AGInventors: Michael GEHMLICH, Gudrun KISSINGER, Karl MANGELBERGER, Timo MUELLER, Michael SKROBANEK
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Patent number: 11639558Abstract: A method produces a single-crystal silicon semiconductor wafer. A single-crystal silicon substrate wafer is double side polished. A front side of the substrate wafer is chemical mechanical polished (CMP). An epitaxial layer of single-crystal silicon is deposited on the front side of the substrate wafer. A first rapid thermal anneal (RTA) treatment is performed on the coated substrate wafer at 1275-1295° C. for 15-30 seconds in argon and oxygen, having oxygen of 0.5-2.0 vol %. The coated substrate wafer is then cooled at or below 800° C., with 100 vol % argon. A second RTA treatment is performed on the coated substrate wafer at a 1280-1300° C. for 20-35 seconds in argon. An oxide layer is removed from a front side of the coated substrate wafer. The front side of the coated substrate wafer is polished by CMP.Type: GrantFiled: July 7, 2022Date of Patent: May 2, 2023Assignee: SILTRONIC AGInventors: Timo Mueller, Michael Boy, Michael Gehmlich, Andreas Sattler
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Publication number: 20220349089Abstract: A method produces a single-crystal silicon semiconductor wafer. A single-crystal silicon substrate wafer is double side polished. A front side of the substrate wafer is chemical mechanical polished (CMP). An epitaxial layer of single-crystal silicon is deposited on the front side of the substrate wafer. A first rapid thermal anneal (RTA) treatment is performed on the coated substrate wafer at 1275-1295° C. for 15-30 seconds in argon and oxygen, having oxygen of 0.5-2.0 vol %. The coated substrate wafer is then cooled at or below 800° C., with 100 vol % argon. A second RTA treatment is performed on the coated substrate wafer at a 1280-1300° C. for 20-35 seconds in argon. An oxide layer is removed from a front side of the coated substrate wafer. The front side of the coated substrate wafer is polished by CMP.Type: ApplicationFiled: July 7, 2022Publication date: November 3, 2022Inventors: Timo Mueller, Michael Boy, Michael Gehmlich, Andreas Sattler
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Patent number: 11280026Abstract: A semiconductor wafer made of single-crystal silicon has an oxygen concentration (new ASTM) of not less than 4.9×1017 atoms/cm3 and not more than 6.5×107 atoms/cm3 and a nitrogen concentration (new ASTM) of not less than 8×1012 atoms/cm3 and not more than 5×1013 atoms/cm3, wherein a frontside of the semiconductor wafer is covered with an epitaxial layer made of silicon, wherein the semiconductor wafer comprises BMDs of octahedral shape whose mean size is 13 to 35 nm, and whose mean density is not less than 3×108 cm?3 and not more than 4×109 cm?3, as determined by IR tomography.Type: GrantFiled: June 25, 2018Date of Patent: March 22, 2022Assignee: SILTRONIC AGInventors: Timo Mueller, Andreas Sattler, Robert Kretschmer, Gudrun Kissinger, Dawid Kot
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Patent number: 10961640Abstract: Semiconductor wafers useful for NAND circuitry and having a front side, a rear side, a middle and a periphery, have an Nv region which extends from the middle to the periphery; a denuded zone which extends from the front side to a depth of not less than 20 ?m into the interior of the semiconductor wafer, where the density of vacancies in the denuded zone, determined by means of platinum diffusion and DLTS is not more than 1×1013 vacancies/cm3; a concentration of oxygen of not less than 4.5×1017 atoms/cm3 and not more than 5.5×1017 atoms/cm3; a region in the interior of the semiconductor wafer which adjoins the denuded zone and has nuclei which can be developed by means of a heat treatment into BMDs having a peak density of not less than 6.0×109/cm3, where the heat treatment comprises heating the semiconductor wafer to a temperature of 800° C. over a period of four hours and to a temperature of 1000° C. over a period of 16 hours. The wafers are produced by a unique RTA treatment of Nv wafers.Type: GrantFiled: December 8, 2017Date of Patent: March 30, 2021Assignee: SILTRONIC AGInventors: Timo Mueller, Michael Gehmlich, Andreas Sattler
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Patent number: 10844515Abstract: A semiconductor wafer comprising single-crystal silicon has defined concentrations of oxygen, nitrogen and hydrogen; the semiconductor wafer further contains BMD seeds having a density averaged over the radius of not less than 1×105 cm?3 and not more than 1×107 cm?3; surface defects having a density averaged over the radius of not less than 1100 cm?2; and BMDs, whose density is not lower than a lower limit of 5×108/cm3. The semiconductor wafers are produced by a process which enables obtention of the required ranges of concentrations of oxygen, nitrogen, hydrogen, BMD seeds, and BMD's.Type: GrantFiled: December 2, 2016Date of Patent: November 24, 2020Assignee: SILTRONIC AGInventors: Timo Mueller, Walter Heuwieser, Michael Skrobanek, Gudrun Kissinger
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Publication number: 20200248333Abstract: A semiconductor wafer of single-crystal silicon includes: a polished front side and a back side; a denuded zone, which extends from the polished front side toward the back side to a depth of not less than 45 ?m; and a region adjacent to the denuded zone, the region having bulk micro defect (BMD) seeds, which are capable of being developed into BMDs. A density of the BMDs at a distance of 120 ?m from the front side is not less than 3×109 cm?3.Type: ApplicationFiled: October 9, 2018Publication date: August 6, 2020Inventors: Timo Mueller, Michael Boy, Michael Gehmlich, Andreas Sattler
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Publication number: 20200240039Abstract: Semiconductor wafers useful for NAND circuitry and having a front side, a rear side, a middle and a periphery, have an Nv region which extends from the middle to the periphery; a denuded zone which extends from the front side to a depth of not less than 20 ?m into the interior of the semiconductor wafer, where the density of vacancies in the denuded zone, determined by means of platinum diffusion and DLTS is not more than 1×1013 vacancies/cm3; a concentration of oxygen of not less than 4.5×1017 atoms/cm3 and not more than 5.5×1017 atoms/cm3; a region in the interior of the semiconductor wafer which adjoins the denuded zone and has nuclei which can be developed by means of a heat treatment into BMDs having a peak density of not less than 6.0×109/cm3, where the heat treatment comprises heating the semiconductor wafer to a temperature of 800° C. over a period of four hours and to a temperature of 1000° C. over a period of 16 hours. The wafers are produced by a unique RTA treatment of Nv wafers.Type: ApplicationFiled: December 8, 2017Publication date: July 30, 2020Applicant: SILTRONIC AGInventors: Timo MUELLER, Michael GEHMLICH, Andreas SATTLER
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Publication number: 20200165745Abstract: A semiconductor wafer made of single-crystal silicon has an oxygen concentration (new ASTM) of not less than 4.9×1017 atoms/cm3 and not more than 6.5×107 atoms/cm3 and a nitrogen concentration (new ASTM) of not less than 8×1012 atoms/cm3 and not more than 5×1013 atoms/cm3, wherein a frontside of the semiconductor wafer is covered with an epitaxial layer made of silicon, wherein the semiconductor wafer comprises BMDs of octahedral shape whose mean size is 13 to 35 nm, and whose mean density is not less than 3×108 cm?3 and not more than 4×109 cm?3, as determined by IR tomography.Type: ApplicationFiled: June 25, 2018Publication date: May 28, 2020Applicant: SILTRONIC AGInventors: Timo MUELLER, Andreas SATTLER, Robert KRETSCHMER, Gudrun KISSINGER, Dawid KOT
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Patent number: 10483128Abstract: Epitaxial wafers with a high concentration of BMD nuclei or developed BMDs just below a denuded zone, and having low surface roughness, are produced by forming an oxynitride layer on a purposefully oxidized epitaxial layer by a short RTA treatment in a nitriding atmosphere, removing the oxynitride layer, and then polishing the epitaxial surface.Type: GrantFiled: October 29, 2015Date of Patent: November 19, 2019Assignee: SILTRONIC AGInventors: Timo Mueller, Michael Gehmlich, Frank Faller
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Publication number: 20180371639Abstract: A semiconductor wafer comprising single-crystal silicon has defined concentrations of oxygen, nitrogen and hydrogen; the semiconductor wafer further comprises: BMD seeds having a density averaged over the radius of not less than 1×105 cm?3 and not more than 1×107 cm?3; surface defects having a density averaged over the radius of not less than 1100 cm?2; and BMDs, whose density is not lower than a lower limit of 5×108/cm3. The semiconductor wafers are produced by a process which enables obtention of the required ranges of concentrations of oxygen, nitrogen, hydrogen, BMD seeds, and BMD's.Type: ApplicationFiled: December 2, 2016Publication date: December 27, 2018Applicant: SILTRONIC AGInventors: Timo MUELLER, Walter HEUWIESER, Michael SKROBANEK, Gudrun KISSINGER
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Publication number: 20180047586Abstract: Epitaxial wafers with a high concentration of BMD nuclei or developed BMDs just below a denuded zone, and having low surface roughness, are produced by forming an oxynitride layer on a purposefully oxidized epitaxial layer by a short RTA treatment in a nitriding atmosphere, removing the oxynitride layer, and then polishing the epitaxial surface.Type: ApplicationFiled: October 29, 2015Publication date: February 15, 2018Applicant: Siltronic AGInventors: Timo MUELLER, Michael GEHMLICH, Frank FALLER
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Patent number: 9772743Abstract: A control pad displayed on a touchscreen of a touchscreen device can be used by a user to control or manipulate characters, objects, or entities within a game environment. In some embodiments, the control pad is activated and displayed at a location of the touchscreen based at least in part on a touch signal location within a defined partition of the touchscreen. In response to the touch signal being moved within the boundary of the control pad, an action or manipulation of the game environment may be performed based at least in part on the location of the touch signal relative to the control pad. In some embodiments, if the touch signal is moved outside the boundary of the control pad, the position of the control pad is adjusted such that the location of the touch signal remains on or within the boundary of the control pad.Type: GrantFiled: June 25, 2015Date of Patent: September 26, 2017Assignee: ELECTRONIC ARTS INC.Inventors: Timo Mueller, Young Tae Son
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Patent number: 9458554Abstract: The invention relates to a semiconductor wafer of monocrystalline silicon, and to a method for producing it. The semiconductor wafer has a zone, DZ, which is free of BMD defects and extends from a front side of the semiconductor wafer into the bulk of the semiconductor wafer, and a region having BMD defects which extends from the DZ further into the bulk of the semiconductor wafer. A silicon single crystal is pulled by the Czochralski method and processed to form a polished monocrystalline silicon substrate wafer. The substrate wafer is treated by rapidly heating and cooling the substrate wafer, slowly heating the rapidly heated and cooled substrate wafer, and keeping the substrate wafer at a specific temperature and over a specific period.Type: GrantFiled: July 24, 2013Date of Patent: October 4, 2016Assignee: Siltronic AGInventors: Timo Mueller, Gudrun Kissinger, Dawid Kot, Andreas Sattler
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Publication number: 20160053405Abstract: The invention relates to a semiconductor wafer of monocrystalline silicon, and to a method for producing it. The semiconductor wafer has a zone, DZ, which is free of BMD defects and extends from a front side of the semiconductor wafer into the bulk of the semiconductor wafer, and a region having BMD defects which extends from the DZ further into the bulk of the semiconductor wafer. A silicon single crystal is pulled by the Czochralski method and processed to form a polished monocrystalline silicon substrate wafer. The substrate wafer is treated by rapidly heating and cooling the substrate wafer, slowly heating the rapidly heated and cooled substrate wafer, and keeping the substrate wafer at a specific temperature and over a specific period.Type: ApplicationFiled: November 5, 2015Publication date: February 25, 2016Inventors: Timo Mueller, Gudrun Kissinger, Dawid Kot, Andreas Sattler
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Patent number: 9230798Abstract: Monocrystalline silicon semiconductor wafers have a front side and a rear side, and a denuded zone which extends from the front side to the rear side as far as a depth which between a center and an edge of the semiconductor wafer on average is not less than 8 ?m and not more than 18 ?m, and having a region adjoining the denuded zone having BMDs whose density at a distance of 30 ?m from the front side is not less than 2×109 cm?3. The semiconductor wafers are produced by a method comprising providing a substrate wafer of monocrystalline silicon and an RTA treating the substrate wafer, the treatment subdivided into a first thermal treatment of the substrate wafer in an atmosphere consisting of argon and into a second thermal treatment of the substrate wafer in an atmosphere consisting of argon and ammonia.Type: GrantFiled: May 5, 2015Date of Patent: January 5, 2016Assignee: SILTRONIC AGInventors: Timo Mueller, Michael Gehmlich, Frank Faller, Dirk Waehlisch
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Publication number: 20150325433Abstract: Monocrystalline silicon semiconductor wafers have a front side and a rear side, and a denuded zone which extends from the front side to the rear side as far as a depth which between a center and an edge of the semiconductor wafer on average is not less than 8 ?m and not more than 18 ?m, and having a region adjoining the denuded zone having BMDs whose density at a distance of 30 ?m from the front side is not less than 2×109 cm?3. The semiconductor wafers are produced by a method comprising providing a substrate wafer of monocrystalline silicon and an RTA treating the substrate wafer, the treatment subdivided into a first thermal treatment of the substrate wafer in an atmosphere consisting of argon and into a second thermal treatment of the substrate wafer in an atmosphere consisting of argon and ammonia.Type: ApplicationFiled: May 5, 2015Publication date: November 12, 2015Inventors: Timo MUELLER, Michael GEHMLICH, Frank FALLER, Dirk WAEHLISCH
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Publication number: 20150022336Abstract: A system for controlling a turn signal for a motor vehicle is disclosed to detect lane changes of the motor vehicle. The system includes a control device which acquires information provided by an environment sensor, and controls the turn signal as a function of a lane change status.Type: ApplicationFiled: July 22, 2014Publication date: January 22, 2015Inventor: Timo Mueller