Abstract: A method and a device are provided for performing channel simulation. The device includes a radio channel simulation block and a memory and it is configured to simulate a radio connection between a transmitter and a receiver in real time. The device is further configured to simulate a radio connection between at least one interfering signal source and the receiver in real time, and to store the simulation result in the memory, and to read the stored simulation results in real time from the memory and add the results read to the simulation during simulation of the radio connection between the transmitter and the receiver.

Abstract: The invention provides a device for simulating a multi-antenna radio channel, a module and a method. The device comprises channel modules for incorporating propagation effects into channel signals which represent radio signals propagating along propagation paths, which channel modules are electrically connected to neighbour channel modules for forming an (m,n) array configuration. The (m,n)th channel module is configured to receive a first (m,n?1)th channel signal and a second (m?1,n)th channel signal and comprises: a processing resource for processing the first (m,n?1)th channel signal according to a channel model, thus generating a processed (m,n)th channel signal, and a combiner for combining the processed (m,n)th signal and the second (m?1,n)th channel signal, thus generating a second (m,n)th channel signal. The (m,n)th channel module is further configured to output the second (m,n)th channel signal.

Abstract: A method and arrangement for simulating a radio channel. In the solution, a channel having paths is simulated and the delay of each path is formed separately with a low-resolution delay arrangement and a high-resolution delay arrangement in such a manner that the simulated delay of each path is the sum of the low-resolution delay and the high-resolution delay. Low-resolution delaying is performed on each path discontinuously as multiples of a predefined minimum delay. For each signal delayed by a low-resolution delay, at least one fixed, high-resolution delay is selected, which is a predefined part of the predefined minimum delay of a the low-resolution delay. Each signal delayed by a low-resolution delay is delayed by at least one selected high-resolution delay to form a path-specific total delay.

Abstract: A method and a device are provided for performing channel simulation. The device includes a radio channel simulation block and a memory and it is configured to simulate a radio connection between a transmitter and a receiver in real time. The device is further configured to simulate a radio connection between at least one interfering signal source and the receiver in real time, and to store the simulation result in the memory, and to read the stored simulation results in real time from the memory and add the results read to the simulation during simulation of the radio connection between the transmitter and the receiver.

Abstract: The invention provides a device for simulating a multi-antenna radio channel, a module and a method. The device comprises channel modules for incorporating propagation effects into channel signals which represent radio signals propagating along propagation paths, which channel modules are electrically connected to neighbour channel modules for forming an (m,n) array configuration. The (m,n)th channel module is configured to receive a first (m,n?1)th channel signal and a second (m?1,n)th channel signal and comprises: a processing resource for processing the first (m,n?1)th channel signal according to a channel model, thus generating a processed (m,n)th channel signal, and a combiner for combining the processed (m,n)th signal and the second (m?1,n)th channel signal, thus generating a second (m,n)th channel signal. The (m,n)th channel module is further configured to output the second (m,n)th channel signal.

Abstract: A method and arrangement for simulating a radio channel. In the solution, a channel having paths is simulated and the delay of each path is formed separately with a low-resolution delay arrangement and a high-resolution delay arrangement in such a manner that the simulated delay of each path is the sum of the low-resolution delay and the high-resolution delay. Low-resolution delaying is performed on each path discontinuously as multiples of a predefined minimum delay. For each signal delayed by a low-resolution delay, at least one fixed, high-resolution delay is selected, which is a predefined part of the predefined minimum delay of a the low-resolution delay. Each signal delayed by a low-resolution delay is delayed by at least one selected high-resolution delay to form a path-specific total delay.

Abstract: A method and a filter for continuous two-dimensional filtering of discrete m*n data to be processed having n lines each containing m data samples. The filter includes a horizontal filter HF and a vertical filter VF for performing the filtering as successive horizontal and vertical filtering operations for data divided for the processing into blocks having y lines. The filter further includes a first memory M1 for storing horizontal-filtered data to be received from the horizontal filter, a second memory M2 for storing internal intermediate states of the vertical filter, and a timing and synchronizing block TSC for generating address signals A1, A2 and control signals C1, C2 for storing in the first memory and for reading therefrom as well as for storing in the second memory and for reading therefrom.

Abstract: A filter for performing dilation and/or erosion operations associated with mathematical morphology using a W.times.H rectangular structuring element to a two-dimensional matrix of discrete values, the width of the matrix being x and the height being y, includes a horizontal portion for applying the selected operation to a W.times.1 local neighbourhood and a vertical portion for applying the selected operation to a 1.times.H local neighbourhood. According to one aspect of the filer, the portions are connected one after the other and the matrix elements are applied serially to the first portion, the output of one portion being connected to the input of the other portion. Each of the above-mentioned portions includes a multiplicity of delay devices, each device providing an equal delay, and a multiplicity of comparing devices for comparing two input values.