Patents by Inventor Timothy A. Valade

Timothy A. Valade has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7098103
    Abstract: A method of forming a non-single-crystalline capacitor in an integrated circuit. It includes the steps of forming a first non-single-crystalline layer on a gate dielectric layer of a substrate of an integrated circuit. Next, a capacitor dielectric layer is formed on the first non-single-crystalline layer, and a second non-single-crystalline layer is formed on the capacitor dielectric layer. Portions of the second non-single-crystalline layer are removed to define a top plate of the capacitor. Portions of the capacitor dielectric layer are removed to define a dielectric of the capacitor. Also, portions of the first non-single-crystalline layer are removed to define the bottom plate of the capacitor.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: August 29, 2006
    Assignee: Intersil Americas, Inc.
    Inventors: Dustin A. Woodbury, Robert J. Kinzig, James Douglas Beasom, Timothy A. Valade, Donald F. Hemmenway, Kitty Elshot
  • Publication number: 20050202629
    Abstract: A method of forming a non-single-crystalline capacitor in an integrated circuit. It includes the steps of forming a first non-single-crystalline layer on a gate dielectric layer of a substrate of an integrated circuit. Next, a capacitor dielectric layer is formed on the first non-single-crystalline layer, and a second non-single-crystalline layer is formed on the capacitor dielectric layer. Portions of the second non-single-crystalline layer are removed to define a top plate of the capacitor. Portions of the capacitor dielectric layer are removed to define a dielectric of the capacitor. Also, portions of the first non-single-crystalline layer are removed to define the bottom plate of the capacitor.
    Type: Application
    Filed: March 12, 2004
    Publication date: September 15, 2005
    Inventors: Dustin Woodbury, Robert Kinzig, James Beasom, Timothy Valade, Donald Hemmenway, Kitty Elshot
  • Publication number: 20020189640
    Abstract: Pre heat-treatment processing of a silicon wafer to grow a hydrophilic oxide layer includes an initial step of contacting the wafer with a pre-clean SC-1 bath, thereby producing a silicon wafer surface that is highly particle free. After a deionized water rinse, the wafer is scoured with an aqueous solution containing hydrofluoric acid and hydrochloric acid to remove metallic-containing oxide from the wafer surface. In order to grow a hydrophilic oxide layer, an SC-2 bath (containing hydrogen peroxide and a dilute concentration of metal-scouring HCl) is used. The resulting hydrophilic silicon oxide layer grown on the surface of the silicon wafer using the combined SC-1→AF/HCL→SC-2 wafer cleaning process has a metal concentration no greater than 1×109. The diffusion length of minority carriers is increased from a range on the order of 500-600 microns to a range on the order of 800-900 microns.
    Type: Application
    Filed: June 17, 1999
    Publication date: December 19, 2002
    Inventors: JACK H. LINN, GEORGE V. ROUSE, SANA RAFIE, ROBERTA R. NOLAN-LOBMEYER, DIANA LYNN HACKENBERG, STEVEN T. SLASOR, TIMOTHY A. VALADE
  • Patent number: 5932022
    Abstract: Pre heat-treatment processing of a silicon wafer to grow a hydrophilic oxide layer includes an initial step of contacting the wafer with a pre-clean SC-1 bath, thereby producing a silicon wafer surface that is highly particle free. After a deionized water rinse, the wafer is scoured with an aqueous solution containing hydrofluoric acid and hydrochloric acid to remove metallic-containing oxide from the wafer surface. In order to grow a hydrophilic oxide layer, an SC-2 bath (containing hydrogen peroxide and a dilute concentration of metal-scouring HCl) is used. The resulting hydrophilic silicon oxide layer grown on the surface of the silicon wafer using the combined SC-1.fwdarw.HF/HCL.fwdarw.SC-2 wafer cleaning process has a metal concentration no greater than 1.times.10.sup.9. The diffusion length of minority carriers is increased from a range on the order of 500-600 microns to a range on the order of 800-900 microns.
    Type: Grant
    Filed: April 21, 1998
    Date of Patent: August 3, 1999
    Assignee: Harris Corporation
    Inventors: Jack H. Linn, George V. Rouse, Sana Rafie, Roberta R. Nolan-Lobmeyer, Diana Lynn Hackenberg, Steven T. Slasor, Timothy A. Valade