Patents by Inventor Timothy A. Wellsand

Timothy A. Wellsand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for testing address lines
    Patent number: 7532526
    Abstract: Method and systems are described for testing an address line inter-coupling a processor and a memory. The contents of a first address in the memory are initially compared with the contents of a second address in the memory, wherein each of the first and second addresses are addressable in the memory by a different value applied on the address line. If the contents of the first and second addresses match, the contents of either one of the first and second addresses are changed, and a subsequent comparison of the contents of the first and second memory addresses is performed. If the second comparison determines that contents of the first and second memory address still match, then a fault condition associated with the address line is identified.
    Type: Grant
    Filed: October 16, 2007
    Date of Patent: May 12, 2009
    Assignee: GM Global Technology Operations, Inc.
    Inventors: Kerfegar K. Katrak, Hans Chandra, Timothy A. Wellsand
  • METHOD AND SYSTEM FOR TESTING ADDRESS LINES
    Publication number: 20090097343
    Abstract: Method and systems are described for testing an address line inter- coupling a processor and a memory. The contents of a first address in the memory are initially compared with the contents of a second address in the memory, wherein each of the first and second addresses are addressable in the memory by a different value applied on the address line. If the contents of the first and second addresses match, the contents of either one of the first and second addresses are changed, and a subsequent comparison of the contents of the first and second memory addresses is performed. If the second comparison determines that contents of the first and second memory address still match, then a fault condition associated with the address line is identified.
    Type: Application
    Filed: October 16, 2007
    Publication date: April 16, 2009
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS, INC.
    Inventors: KERFEGAR K. KATRAK, HANS CHANDRA, TIMOTHY A. WELLSAND