Patents by Inventor Timothy Adam Monk

Timothy Adam Monk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Calibration of a time-to-digital converter using a virtual phase-locked loop
    Patent number: 11888493
    Abstract: A clock product includes a time-to-digital converter responsive to an input clock signal, a reference clock signal, and a time-to-digital converter calibration signal. The time-to-digital converter includes a coarse time-to-digital converter and a fine time-to digital converter. The clock product includes a calibration circuit including a phase-locked loop. The calibration circuit is configured to generate the time-to-digital converter calibration signal. The clock product includes a controller configured to execute instructions that cause the phase-locked loop to generate an error signal for each possible value of a fine time code of a digital time code generated by the time-to-digital converter and to average the error signal over multiple clock cycles to generate an average error signal.
    Type: Grant
    Filed: December 16, 2022
    Date of Patent: January 30, 2024
    Assignee: Skyworks Solutions, Inc.
    Inventors: Timothy Adam Monk, Douglas F. Pastorello, Krishnan Balakrishnan, Raghunandan Kolar Ranganathan
  • CALIBRATION OF A TIME-TO-DIGITAL CONVERTER USING A VIRTUAL PHASE-LOCKED LOOP
    Publication number: 20230231567
    Abstract: A clock product includes a time-to-digital converter responsive to an input clock signal, a reference clock signal, and a time-to-digital converter calibration signal. The time-to-digital converter includes a coarse time-to-digital converter and a fine time-to digital converter. The clock product includes a calibration circuit including a phase-locked loop. The calibration circuit is configured to generate the time-to-digital converter calibration signal. The clock product includes a controller configured to execute instructions that cause the phase-locked loop to generate an error signal for each possible value of a fine time code of a digital time code generated by the time-to-digital converter and to average the error signal over multiple clock cycles to generate an average error signal.
    Type: Application
    Filed: December 16, 2022
    Publication date: July 20, 2023
    Inventors: Timothy Adam Monk, Douglas F. Pastorello, Krishnan Balakrishnan, Raghunandan Kolar Ranganathan
  • Calibration of a time-to-digital converter using a virtual phase-locked loop
    Patent number: 11563441
    Abstract: A clock product includes a time-to-digital converter responsive to an input clock signal, a reference clock signal, and a time-to-digital converter calibration signal. The time-to-digital converter includes a coarse time-to-digital converter and a fine time-to digital converter. The clock product includes a calibration circuit including a phase-locked loop. The calibration circuit is configured to generate the time-to-digital converter calibration signal. The clock product includes a controller configured to execute instructions that cause the phase-locked loop to generate an error signal for each possible value of a fine time code of a digital time code generated by the time-to-digital converter and to average the error signal over multiple clock cycles to generate an average error signal.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: January 24, 2023
    Assignee: Skyworks Solutions, Inc.
    Inventors: Timothy Adam Monk, Douglas F. Pastorello, Krishnan Balakrishnan, Raghunandan Kolar Ranganathan
  • CALIBRATION OF A TIME-TO-DIGITAL CONVERTER USING A VIRTUAL PHASE-LOCKED LOOP
    Publication number: 20220321137
    Abstract: A clock product includes a time-to-digital converter responsive to an input clock signal, a reference clock signal, and a time-to-digital converter calibration signal. The time-to-digital converter includes a coarse time-to-digital converter and a fine time-to digital converter. The clock product includes a calibration circuit including a phase-locked loop. The calibration circuit is configured to generate the time-to-digital converter calibration signal. The clock product includes a controller configured to execute instructions that cause the phase-locked loop to generate an error signal for each possible value of a fine time code of a digital time code generated by the time-to-digital converter and to average the error signal over multiple clock cycles to generate an average error signal.
    Type: Application
    Filed: March 21, 2022
    Publication date: October 6, 2022
    Inventors: Timothy Adam Monk, Douglas F. Pastorello, Krishnan Balakrishnan, Raghunandan Kolar Ranganathan
  • Calibration of a time-to-digital converter using a virtual phase-locked loop
    Patent number: 11283459
    Abstract: In at least one embodiment, a method includes generating a digital time code corresponding to an input clock signal using a time-to-digital converter responsive to a reference clock signal and a time-to-digital converter calibration signal. The method includes generating the time-to-digital converter calibration signal based on the digital time code. Generating the time-to-digital converter calibration signal includes generating a digital error signal based on the digital time code and an estimated digital time code, and adapting the time-to-digital converter calibration signal based on the digital error signal.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: March 22, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventors: Timothy Adam Monk, Douglas F. Pastorello, Krishnan Balakrishnan, Raghunandan Kolar Ranganathan