Abstract: A door exit device, security system, and method for implementing a delayed egress operating mode and an authorized access operating mode to control access through a door. In one embodiment, the exit device includes an egress enable mechanism including a latch retraction assembly operatively coupled between a push pad and a door latch. The latch retraction assembly retracts the door latch responsive to manual actuation of the push pad. The exit device further includes a delayed egress device having a latch retraction lock that is operatively coupled to the latch retraction assembly to prevent the latch retraction assembly from retracting the door latch coincident with an attempted manual actuation of the push pad. The exit device further includes an access enable device operatively coupled to actuate the latch retraction assembly in response to an authorized access signal.

Abstract: A method an apparatus for providing capability information to a shared controller. In one embodiment, a peripheral bus host controller may be shared by a plurality of peripheral devices coupled to a peripheral bus. The peripheral devices may include coder/decoder (codec) circuitry, and may be implemented using a riser card. The host controller may be configured to query the bus for peripheral devices by reading each address on the bus. During the querying process, the host controller may detect one or more peripheral devices coupled to the bus. Following the completion of the querying of the bus, the host controller may then begin reading configuration information from each of the detected devices. The host controller may employ one or more of several different techniques in order to read configuration information from the peripheral device. The configuration information at a minimum includes a device identifier, which may identify the vendor and the function of the device.

Abstract: At system power on, a query is sent from a PCI or host-based controller to an attached codec for the vendor specific identification code associated with that codec. The PCI/host controller then sets its PCI vendor and subvendor ID's to match the specific system comprised of the controller and codec devices. That vendor specific identification code is then utilized within the PCI enumeration process to search for the specific modem driver associated with that codec.

Abstract: An Audio Encoder/Decoder (AC)-97 protocol link is used for concurrent data communication between AC-97 protocol devices and non-AC-97 protocol devices. The Tag data in an AC-97 data frame is used to select specific CODECs and to determine which data time slots to ignore or accept. Since telephone voice and data communication uses only the Tag data and one other of the data frame time slots, eleven slots are available for communication using non-AC-97 protocol devices concurrent with telephony communications. Ethernet, Home Phoneline Network Alliance (HPNA), Attachment Unit Interface (AUI) are some of the data communication protocols that may be employed using embodiments of the present invention. An AC-97 data communication controller may modified with additional logic and control lines to support additional features of non-AC-97 protocol devices.

Abstract: A system and method for implementing a multi-level interrupt scheme in a computer system is provided. Bus devices and a bus controller may be coupled to a shared bus in a computer system. The bus may include an interrupt line for each bus device coupled to the bus. A bus device may be configured to convey an interrupt using its designated interrupt line. Each bus device may be configured to convey different types of interrupt signals on its interrupt line depending on an interrupt priority level of a given interrupt. The bus controller may be configured to receive interrupt signals from each bus device coupled to the bus and may arbitrate amongst the interrupt signals based on the interrupt priority level of each interrupt signal. The bus controller may grant the interrupt that corresponds to the highest priority level. If multiple interrupts correspond to the same highest priority level in a group of interrupts, then the bus controller may use any suitable arbitration scheme to grant an interrupt.

Abstract: A method and apparatus for passing device configuration information to a shared controller. In one embodiment, a host controller may be configured to read configuration from one or more peripheral devices coupled to a serial bus. The peripheral devices may include coder/decoder (codec) circuitry, and may be implemented using a riser card. The host controller may employ one or more of several different techniques in order to read configuration information from the peripheral device. The configuration information at a minimum includes a device identifier, which may identify the vendor and the function of the device. Additional information needed to configure the device to communicate over the peripheral bus may also be obtained with a read of the device, or various lookup mechanisms, such as a lookup table or a tree-like data structure.

Abstract: When a riser card is connected to a computer system motherboard, a storage device on the riser card will contain configuration data permitting the computer system to configure any peripheral device on the riser card. The configuration data will be treated by the BIOS in the computer system as a virtual add-on ROM thereby allowing it to execute and initialize any and all PCI configuration spaces associated with the riser card peripheral devices.