Patents by Inventor Timothy D Henson
Timothy D Henson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150325685Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a trench having substantially parallel trench sidewalls, and a tapered dielectric liner in the trench. The tapered dielectric liner includes slanted dielectric sidewalls. A conductive filler is enclosed by the slanted dielectric sidewalls in the trench.Type: ApplicationFiled: April 13, 2015Publication date: November 12, 2015Inventors: Timothy D. Henson, Ling Ma, Kapil Kelkar, Ljubo Radic, Hugo Burke, David Paul Jones
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Publication number: 20150279946Abstract: A power semiconductor device is disclosed. The power semiconductor device includes an upper drift region situated over a lower drift region, a field electrode embedded in the lower drift region, the field electrode not being directly aligned with a gate trench in a body region of the power semiconductor device, where respective top surfaces of the field electrode and the lower drift region are substantially co-planar. A conductive filler in the field electrode can be substantially uniformly doped, and the field electrode is in direct electrical contact with the upper drift region.Type: ApplicationFiled: February 27, 2015Publication date: October 1, 2015Inventor: Timothy D. Henson
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Patent number: 9006824Abstract: In one implementation, a power semiconductor device includes an active region and a termination region. A depletion trench finger extends from the active region and ends in the termination region. An arched depletion trench surrounds the depletion trench finger in the termination region, the arched depletion trench enables one or both of an increased breakdown voltage and a reduced on-resistance in the power semiconductor device.Type: GrantFiled: April 10, 2014Date of Patent: April 14, 2015Assignee: International Rectifier CorporationInventor: Timothy D. Henson
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Publication number: 20140374825Abstract: Disclosed is a power semiconductor device that includes a plurality of source trenches and adjacent source regions. The plurality of source trenches extend from a top surface of a semiconductor substrate into the semiconductor substrate. The power semiconductor device further includes a plurality of gate trenches that extend from the top of the semiconductor substrate into the semiconductor substrate, and are arranged in hexagonal or zigzag patterns. A contiguous formation is created by the plurality of gate trenches, and the plurality of gate trenches separate the plurality of source trenches from one another.Type: ApplicationFiled: June 9, 2014Publication date: December 25, 2014Inventors: Kapil Kelkar, Timothy D. Henson, Ling Ma, Hugo Burke, Niraj Ranjan, Alain Charles
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Publication number: 20140339651Abstract: Disclosed is a power device, such as power MOSFET, and method for fabricating same. The device includes an upper trench situated over a lower trench, where the upper trench is wider than the lower trench. The device further includes a trench dielectric inside the lower trench and on sidewalls of the upper trench. The device also includes an electrode situated within the trench dielectric. The trench dielectric of the device has a bottom thickness that is greater than a sidewall thickness.Type: ApplicationFiled: May 1, 2014Publication date: November 20, 2014Applicant: International Rectifier CorporationInventors: Timothy D. Henson, Kapil Kelkar, Ljubo Radic
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Publication number: 20140339670Abstract: Disclosed is a power device, such as a power MOSFET device and a method for fabricating same. The device includes a field plate trench. The field plate trench has a predetermined width and a predetermined sidewall angle. The device further includes a single trench dielectric on sidewalls of the field plate trench and at a bottom of the field plate trench. The single trench dielectric has a bottom thickness that is greater than a sidewall thickness. The device also includes a field plate situated within the single trench dielectric.Type: ApplicationFiled: May 1, 2014Publication date: November 20, 2014Applicant: International Rectifier CorporationInventors: Timothy D. Henson, Kapil Kelkar, Ljubo Radic
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Publication number: 20140339669Abstract: Disclosed is a power device, such as a power MOSFET, and methods for fabricating same. The device includes a field plate trench. The device further includes first and second trench dielectrics inside the field plate trench. The device also includes a field plate situated over the first trench dielectric and within the second trench dielectric. A combined thickness of the first and second trench dielectrics at a bottom of the field plate trench is greater than a sidewall thickness of the second trench dielectric.Type: ApplicationFiled: May 1, 2014Publication date: November 20, 2014Applicant: International Rectifier CorporationInventors: Timothy D. Henson, Kapil Kelkar, Ljubo Radic
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Publication number: 20140332879Abstract: In one implementation, a power semiconductor device includes an active region and a termination region. A depletion trench finger extends from the active region and ends in the termination region. An arched depletion trench surrounds the depletion trench finger in the termination region, the arched depletion trench enables one or both of an increased breakdown voltage and a reduced on-resistance in the power semiconductor device.Type: ApplicationFiled: April 10, 2014Publication date: November 13, 2014Applicant: International Rectifier CorporationInventor: Timothy D. Henson
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Patent number: 8860194Abstract: One exemplary disclosed embodiment comprises a semiconductor package including a vertical conduction control transistor and a vertical conduction sync transistor. The vertical conduction control transistor may include a control source, a control gate, and a control drain that are all accessible from a bottom surface, thereby enabling electrical and direct surface mounting to a support surface. The vertical conduction sync transistor may include a sync drain on a top surface, which may be connected to a conductive clip that is coupled to the support surface. The conductive clip may also be thermally coupled to the control transistor. Accordingly, all terminals of the transistors are readily accessible through the support surface, and a power circuit, such as a buck converter power phase, may be implemented through traces of the support surface. Optionally, a driver IC may be integrated into the package, and a heatsink may be attached to the conductive clip.Type: GrantFiled: November 1, 2012Date of Patent: October 14, 2014Assignee: International Rectifier CorporationInventors: Ling Ma, Andrew N. Sawle, David Paul Jones, Timothy D. Henson, Niraj Ranjan, Vijay Viswanathan, Omar Hassen
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Publication number: 20140118032Abstract: One exemplary disclosed embodiment comprises a semiconductor package including a vertical conduction control transistor and a vertical conduction sync transistor. The vertical conduction control transistor may include a control source, a control gate, and a control drain that are all accessible from a bottom surface, thereby enabling electrical and direct surface mounting to a support surface. The vertical conduction sync transistor may include a sync drain on a top surface, which may be connected to a conductive clip that is coupled to the support surface. The conductive clip may also be thermally coupled to the control transistor. Accordingly, all terminals of the transistors are readily accessible through the support surface, and a power circuit, such as a buck converter power phase, may be implemented through traces of the support surface. Optionally, a driver IC may be integrated into the package, and a heatsink may be attached to the conductive clip.Type: ApplicationFiled: November 1, 2012Publication date: May 1, 2014Applicant: INTERNATIONAL RECTIFIER CORPORATIONInventors: Ling Ma, Andrew N. Sawle, David Paul Jones, Timothy D. Henson, Niraj Ranjan, Vijay Viswanathan, Omar Hassen
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Patent number: 8698232Abstract: According to one embodiment, a semiconductor device including a voltage controlled termination structure comprises an active area including a base region of a first conductivity type formed in a semiconductor body of a second conductivity type formed over a first major surface of a substrate of the second conductivity type, a termination region formed in the semiconductor body adjacent the active area and including the voltage controlled termination structure. The voltage controlled termination structure includes an electrode electrically connected to a terminal of the semiconductor device. In one embodiment, the electrode of the voltage controlled termination structure is electrically connected to a gate terminal of the semiconductor device. In one embodiment, the electrode of the voltage controlled termination structure is electrically connected to a source terminal of the semiconductor device.Type: GrantFiled: January 4, 2010Date of Patent: April 15, 2014Assignee: International Rectifier CorporationInventors: Aram Arzumanyan, Timothy D. Henson, Ling Ma
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Publication number: 20130264636Abstract: According to an exemplary implementation, a field-effect transistor (FET) includes first and second gate trenches extending to a drift region of a first conductivity type. The FET also includes a base region of a second conductivity type that is situated between the first and second gate trenches. A ruggedness enhancement region is situated between the first and second gate trenches, where the ruggedness enhancement region is configured to provide an enhanced avalanche current path from a drain region to the base region when the FET is in an avalanche condition. The enhanced avalanche current path is away from the first and second gate trenches. The ruggedness enhancement region can be of the second conductivity type that includes a higher dopant concentration than the base region. Furthermore, the ruggedness enhancement region can be extending below the first and second gate trenches.Type: ApplicationFiled: March 11, 2013Publication date: October 10, 2013Applicant: International Rectifier CorporationInventors: Ashita Mirchandani, Timothy D. Henson, Ling Ma, Niraj Ranjan
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Patent number: 8536645Abstract: According to an exemplary embodiment, a trench field-effect transistor (trench FET) includes a trench formed in a semiconductor substrate, the trench including a gate dielectric disposed therein. A source region is disposed adjacent the trench. The trench FET also has a gate electrode including a lower portion disposed in the trench and a proud portion extending laterally over the source region. A silicide source contact can extend vertically along a sidewall of the source region. Also, a portion of the gate dielectric can extend laterally over the semiconductor substrate. The trench FET can further include a silicide gate contact formed over the proud portion of the gate electrode.Type: GrantFiled: February 21, 2011Date of Patent: September 17, 2013Assignee: International Rectifier CorporationInventors: Timothy D. Henson, Ling Ma, Hugo Burke, David P. Jones, Martin Carroll
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Publication number: 20120211825Abstract: According to an exemplary embodiment, a trench field-effect transistor (trench FET) includes a trench formed in a semiconductor substrate, the trench including a gate dielectric disposed therein. A source region is disposed adjacent the trench. The trench FET also has a gate electrode including a lower portion disposed in the trench and a proud portion extending laterally over the source region. A silicide source contact can extend vertically along a sidewall of the source region. Also, a portion of the gate dielectric can extend laterally over the semiconductor substrate. The trench FET can further include a silicide gate contact formed over the proud portion of the gate electrode.Type: ApplicationFiled: February 21, 2011Publication date: August 23, 2012Applicant: INTERNATIONAL RECTIFIER CORPORATIONInventors: Timothy D. Henson, Ling Ma, Hugo Burke, David P. Jones, Martin Carroll
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Publication number: 20110284950Abstract: Disclosed is a method for fabricating a shallow and narrow trench field-effect transistor (trench FET). The method includes forming a trench within a semiconductor substrate of a first conductivity type, the trench including sidewalls and a bottom portion. The method further includes forming a substantially uniform gate dielectric in the trench, and forming a gate electrode within said trench and over said gate dielectric. The method also includes doping the semiconductor substrate to form a channel region of a second conductivity type after forming the trench. In one embodiment, the doping step is performed after forming the gate dielectric and after forming the gate electrode. In another embodiment, the doping step is performed after forming the gate dielectric, but prior to forming the gate electrode. Structures formed by the invention's method are also disclosed.Type: ApplicationFiled: May 20, 2010Publication date: November 24, 2011Applicant: INTERNATIONAL RECTIFIER CORPORATIONInventors: Timothy D. Henson, Ling Ma, Hugo Burke, David P. Jones, Kapil Kelkar, Niraj Ranjan
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Publication number: 20110163373Abstract: According to one embodiment, a semiconductor device including a voltage controlled termination structure comprises an active area including a base region of a first conductivity type formed in a semiconductor body of a second conductivity type formed over a first major surface of a substrate of the second conductivity type, a termination region formed in the semiconductor body adjacent the active area and including the voltage controlled termination structure. The voltage controlled termination structure includes an electrode electrically connected to a terminal of the semiconductor device. In one embodiment, the electrode of the voltage controlled termination structure is electrically connected to a gate terminal of the semiconductor device. In one embodiment, the electrode of the voltage controlled termination structure is electrically connected to a source terminal of the semiconductor device.Type: ApplicationFiled: January 4, 2010Publication date: July 7, 2011Applicant: INTERNATIONAL RECTIFIER CORPORATIONInventors: Aram Arzumanyan, Timothy D. Henson, Ling Ma
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Patent number: 7554153Abstract: A power semiconductor device which includes an implant region in the base region thereof to reduce Qgd.Type: GrantFiled: March 7, 2007Date of Patent: June 30, 2009Assignee: International Rectifier CorporationInventor: Timothy D. Henson
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Patent number: 7482654Abstract: A power semiconductor device which includes a source field electrode, and at least one insulated gate electrode adjacent a respective side of the source field electrode, the source field electrode and the gate electrode being disposed in a common trench, and a method for fabricating the device.Type: GrantFiled: April 20, 2005Date of Patent: January 27, 2009Assignee: International Rectifier CorporationInventors: Jianjun Cao, Timothy D. Henson, Naresh Thapar, Paul Harvey, David Kent
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Patent number: 7161208Abstract: A trench MOS-gated semiconductor device that includes field relief regions formed below its base region to improve its breakdown voltage, and method for its manufacturing.Type: GrantFiled: May 13, 2003Date of Patent: January 9, 2007Assignee: International Rectifier CorporationInventors: Kyle Spring, Jianjun Cao, Timothy D Henson
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Publication number: 20030213993Abstract: A trench MOS-gated semiconductor device that includes field relief regions formed below its base region to improve its breakdown voltage, and method for its manufacturing.Type: ApplicationFiled: May 13, 2003Publication date: November 20, 2003Inventors: Kyle Spring, Jianjun Cao, Timothy D. Henson