Patents by Inventor Timothy D. Wig
Timothy D. Wig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10999924Abstract: An apparatus comprising includes a first pair of conductors to carry differential signals, at least one ground conductor neighboring the first pair of conductors, the ground conductor to be connected to a ground plane, and at least one particular conductor to carry sideband signals. The particular conductor is to be connected to a ground plane via a resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor.Type: GrantFiled: December 20, 2019Date of Patent: May 4, 2021Assignee: Intel CorporationInventors: Timothy D. Wig, Steven K. Krooswyk, Marc Wells
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Patent number: 10996825Abstract: Systems, apparatuses and methods may provide for an electronic spine and one or more digital pages removably attached to the electronic spine, wherein the one or more digital pages include a first side with a first flexible display and a second side with a second flexible display. In one example, the system may further include a magnetic interface, wherein the digital page is removably attached to the electronic spine via the magnetic interface.Type: GrantFiled: June 20, 2016Date of Patent: May 4, 2021Assignee: Intel CorporationInventors: Christian Karl, Charles Magnuson, Sergei Babokhov, Timothy D. Wig
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Patent number: 10811823Abstract: A system board is provided that includes a connector. The connector includes a pinfield. The pinfield includes a set of differential signal conductors to correspond to pins of a set of differential signaling pairs; a set of one or more auxiliary signal conductors to carry auxiliary signals; and a plurality of thru-hole ground vias adjacent to a particular one of the auxiliary signal conductors in the set of auxiliary signal conductors. A method for improving signal integrity in a computer interconnect can include carrying differential signals on a set of differential signal vias in a connector pinfield; carrying sideband signals on a set of sideband vias in the connector pinfield; and reducing via-to-via crosstalk between a particular one of the sideband vias and one of the differential signal vias through one or more thru-hole ground vias adjacent to the particular sideband via in the pinfield.Type: GrantFiled: July 23, 2018Date of Patent: October 20, 2020Assignee: Intel CorporationInventor: Timothy D. Wig
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Publication number: 20200275549Abstract: An apparatus comprising includes a first pair of conductors to carry differential signals, at least one ground conductor neighboring the first pair of conductors, the ground conductor to be connected to a ground plane, and at least one particular conductor to carry sideband signals. The particular conductor is to be connected to a ground plane via a resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor.Type: ApplicationFiled: December 20, 2019Publication date: August 27, 2020Applicant: Intel CorporationInventors: Timothy D. Wig, Steven K. Krooswyk, Marc Wells
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Patent number: 10602607Abstract: An apparatus comprising includes a first pair of conductors to carry differential signals, at least one ground conductor neighboring the first pair of conductors, the ground conductor to be connected to a ground plane, and at least one particular conductor to carry sideband signals. The particular conductor is to be connected to a ground plane via a resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor.Type: GrantFiled: May 14, 2018Date of Patent: March 24, 2020Assignee: Intel CorporationInventors: Timothy D. Wig, Steven K. Krooswyk, Marc Wells
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Patent number: 10517168Abstract: An apparatus comprising includes a first pair of conductors to carry differential signals, at least one ground conductor neighboring the first pair of conductors, the ground conductor to be connected to a ground plane, and at least one particular conductor to carry sideband signals. The particular conductor is to be connected to a ground plane via a resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor.Type: GrantFiled: May 14, 2018Date of Patent: December 24, 2019Assignee: Intel CorporationInventors: Timothy D. Wig, Steven K. Krooswyk, Marc Wells
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Publication number: 20190021165Abstract: An apparatus comprising includes a first pair of conductors to carry differential signals, at least one ground conductor neighboring the first pair of conductors, the ground conductor to be connected to a ground plane, and at least one particular conductor to carry sideband signals. The particular conductor is to be connected to a ground plane via a resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor.Type: ApplicationFiled: May 14, 2018Publication date: January 17, 2019Applicant: Intel CorporationInventors: Timothy D. Wig, Steven K. Krooswyk, Marc Wells
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Publication number: 20180331472Abstract: A system board is provided that includes a connector. The connector includes a pinfield. The pinfield includes a set of differential signal conductors to correspond to pins of a set of differential signaling pairs; a set of one or more auxiliary signal conductors to carry auxiliary signals; and a plurality of thru-hole ground vias adjacent to a particular one of the auxiliary signal conductors in the set of auxiliary signal conductors.Type: ApplicationFiled: July 23, 2018Publication date: November 15, 2018Applicant: Intel CorporationInventor: Timothy D. Wig
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Patent number: 10038281Abstract: A circuit board is provided including a top ground plane, a bottom ground plane, and a pin field of a connector with a plurality of pins that includes a plurality of differential pin pairs, one or more ground pins, and one or more sideband pins. At least a particular one of the sideband pins is positioned within the pin field adjacent to a first pin of a first one of the differential pin pairs. One or more ground vias are provided on the circuit board positioned to correspond to the particular sideband pin.Type: GrantFiled: September 25, 2015Date of Patent: July 31, 2018Assignee: Intel CorporationInventor: Timothy D. Wig
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Patent number: 9974161Abstract: An apparatus comprising includes a first pair of conductors to carry differential signals, at least one ground conductor neighboring the first pair of conductors, the ground conductor to be connected to a ground plane, and at least one particular conductor to carry sideband signals. The particular conductor is to be connected to a ground plane via a resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor.Type: GrantFiled: March 24, 2016Date of Patent: May 15, 2018Assignee: Intel CorporationInventors: Timothy D. Wig, Steven K. Krooswyk, Marc Wells
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Publication number: 20170364220Abstract: Systems, apparatuses and methods may provide for an electronic spine and one or more digital pages removably attached to the electronic spine, wherein the one or more digital pages include a first side with a first flexible display and a second side with a second flexible display. In one example, the system may further include a magnetic interface, wherein the digital page is removably attached to the electronic spine via the magnetic interface.Type: ApplicationFiled: June 20, 2016Publication date: December 21, 2017Applicant: Intel CorporationInventors: Christian Karl, Charles Magnuson, Sergei Babokhov, Timothy D. Wig
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Patent number: 9599661Abstract: Embodiments of the invention describe apparatuses, systems and method for utilizing testing instruments having electrical interconnects formed from High Density Interconnect (HDI) multi-layer substrates. Electrical signals may be routed between devices mounted on HDI substrates by way of conductive interconnects formed within their multiple layers. The conductive interconnects are generally comprised of metal interconnects and vias, where each via penetrates between layers to couple a metal interconnect from one layer to a metal interconnect from another layer. By utilizing HDI substrates, embodiments of the invention enable “breaking out” the signal pins on multiple layers, perhaps double or triple the routing layers of the package channel; however, the geometry of the transmission lines and other factors may be chosen to ensure channel parameters such as impedance and crosstalk closely emulate the final device package.Type: GrantFiled: September 27, 2012Date of Patent: March 21, 2017Assignee: Intel CorporationInventor: Timothy D. Wig
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Publication number: 20170047686Abstract: A circuit board is provided including a top ground plane, a bottom ground plane, and a pin field of a connector with a plurality of pins that includes a plurality of differential pin pairs, one or more ground pins, and one or more sideband pins. At least a particular one of the sideband pins is positioned within the pin field adjacent to a first pin of a first one of the differential pin pairs. One or more ground vias are provided on the circuit board positioned to correspond to the particular sideband pin.Type: ApplicationFiled: September 25, 2015Publication date: February 16, 2017Inventor: Timothy D. Wig
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Patent number: 9560760Abstract: Techniques for reducing resonance in contact fingers of a connector are described herein. An example of a device in accordance with the present techniques includes an add-in-card that includes a circuit board and an edge contact finger disposed on an outer surface of the circuit board. The add-in-card also includes a resonator disposed in an internal layer of the circuit board and coupled to the edge contact finger, wherein the resonator reduces a resonance in the edge contact finger.Type: GrantFiled: May 28, 2013Date of Patent: January 31, 2017Assignee: Intel CorporationInventor: Timothy D. Wig
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Publication number: 20160380393Abstract: An apparatus comprising includes a first pair of conductors to carry differential signals, at least one ground conductor neighboring the first pair of conductors, the ground conductor to be connected to a ground plane, and at least one particular conductor to carry sideband signals. The particular conductor is to be connected to a ground plane via a resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor.Type: ApplicationFiled: March 24, 2016Publication date: December 29, 2016Inventors: Timothy D. Wig, Steven K. Krooswyk, Marc Wells
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Publication number: 20140357105Abstract: Techniques for reducing resonance in contact fingers of a connector are described herein. An example of a device in accordance with the present techniques includes an add-in-card that includes a circuit board and an edge contact finger disposed on an outer surface of the circuit board. The add-in-card also includes a resonator disposed in an internal layer of the circuit board and coupled to the edge contact finger, wherein the resonator reduces a resonance in the edge contact finger.Type: ApplicationFiled: May 28, 2013Publication date: December 4, 2014Inventor: Timothy D. Wig
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Publication number: 20140084954Abstract: Embodiments of the invention describe apparatuses, systems and method for utilizing testing instruments having electrical interconnects formed from High Density Interconnect (HDI) multi-layer substrates. Electrical signals may be routed between devices mounted on HDI substrates by way of conductive interconnects formed within their multiple layers. The conductive interconnects are generally comprised of metal interconnects and vias, where each via penetrates between layers to couple a metal interconnect from one layer to a metal interconnect from another layer. By utilizing HDI substrates, embodiments of the invention enable “breaking out” the signal pins on multiple layers, perhaps double or triple the routing layers of the package channel; however, the geometry of the transmission lines and other factors may be chosen to ensure channel parameters such as impedance and crosstalk closely emulate the final device package.Type: ApplicationFiled: September 27, 2012Publication date: March 27, 2014Inventor: Timothy D. Wig
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Patent number: 7342969Abstract: At least two sequences of predetermined reference times are established on respective ones of at least two communication lines. At least some of the reference times of at least one of the sequences occur out-of-phase with at least some of the reference times of another of the sequences. Digital data is encoded onto data signals on one or more communication lines such that a time difference between at least one of the data signals and the nearest one of the reference times on one of the communication lines is smaller than the time difference between the same data signal and the nearest one of the reference times on another one of the communication lines.Type: GrantFiled: July 28, 2003Date of Patent: March 11, 2008Assignee: Intel CorporationInventors: Larry R. Tate, Timothy D. Wig