Patents by Inventor Timothy D Wilkinson

Timothy D Wilkinson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7257007
    Abstract: In an active semiconductor backplane for a liquid crystal spatial light modulator, spacers (25) which are distributed over the backplane extend above an array of electrical and/or electronic elements and comprise at least two layers essentially of the same material and occuring in the same order as is found in at least one of the electrical or electronic elements, such as an NMOS transistor (52). The latter is formed from a stack of layers on a silicon substrate (51) comprising polysilicon (56), continuous silicon oxide (57) modified to include gate oxide GOX (55), metallic gate electrode (59), continuous silicon oxide (58) and a metallic drain electrode (60) which is coupled to a spaced mirror electrode over the layer (58). Likewise, spacer (25) comprises the layers (57 and 58) with metallic (67, 68) deposited simultaneously with electrodes (59, 60). The foot of layer (57) is differently modified to include field oxide layer (69) and polysilicon layers thin oxide (71).
    Type: Grant
    Filed: February 28, 2002
    Date of Patent: August 14, 2007
    Assignee: Qinetiq Limited
    Inventors: Timothy D Wilkinson, William A Crossland, Tat C B Yu
  • Patent number: 6864944
    Abstract: An electro-optic device such as a smectic liquid crystal cell 1 with an active semiconductor backplane 3 is mounted on a hybrid substrate 2, for example of alumina or silica. Other active or passive electronic or optical components may also be mounted on the substrate, and interconnected by conductive tracks, for example by wire bonding 17, and the substrate itself may be mounted on a printed circuit board. The substrate may comprise a heat sink. The arrangement facilitates the safe connection of the liquid crystal cell and good optical alignment thereof.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: March 8, 2005
    Assignee: QinetiQ Limited
    Inventors: David C Scattergood, Maurice Stanley, Timothy D Wilkinson
  • Patent number: 6690444
    Abstract: In active semiconductor backplane (3), for example for a smectic liquid crystal cell, which comprises an array of electronic or elctrical elements in a first region (4), logic elements for addressing said array in a second region spaced from the first, and conductors coupling said first and second regions, the first and second regions are sufficiently widely spaced (21, 22) (providing a “glue lane”) to permit the presence of an adhesive sealing strip therebetween without substantial contact with the first and/or second regions, even when an opposed substrate is sealed thereto. The backplane may comprise spacers (25, 26) in the first region and/or glue lane.
    Type: Grant
    Filed: August 1, 2001
    Date of Patent: February 10, 2004
    Assignee: QinetiQ Limited
    Inventors: Timothy D Wilkinson, William A Crossland
  • Publication number: 20030193491
    Abstract: A display device has a number of pixels to display an image. A first set of electrodes and a second set of electrodes are provided. To display an image in accordance with image data, the first and second sets of electrodes are addressed with a first set of drive signals and a second set of drive signals respectively in order to drive the pixels of the display device. The first set of drive signals is predefined. The image data is compressed. The second set of drive signals is obtained from the compressed image data.
    Type: Application
    Filed: April 14, 2003
    Publication date: October 16, 2003
    Applicant: CAMBRIDGE UNIVERSITY TECHNICAL SERVICES LIMITED
    Inventors: Nicholas A. Lawrence, Timothy D. Wilkinson, William A. Crossland
  • Publication number: 20030161126
    Abstract: In an active semiconductor backplane for a liquid crystal spatial light modulator, spacers (25) which are distributed over the backplane extend above an array of electrical and/or electronic elements and comprise at least two layers essentially of the same material and occuring in the same order as is found in at least one of the electrical or electronic elements, such as an NMOS transistor (52). The latter is formed from a stack of layers on a silicon substrate (51) comprising polysilicon (56), continuous silicon oxide (57) modified to include gate oxide GOX (55), metallic gate electrode (59), continuous silicon oxide (58) and a metallic drain electrode (60) which is coupled to a spaced mirror electrode over the layer (58). Likewise, spacer (25) comprises the layers (57 and 58) with metallic (67, 68) deposited simultaneously with electrodes (59, 60). The foot of layer (57) is differently modified to include field oxide layer (69) and polysilicon layers (70, 72) spaced by thin oxide (71).
    Type: Application
    Filed: February 28, 2002
    Publication date: August 28, 2003
    Inventors: Timothy D. Wilkinson, William A. Crossland, Tat C.B. Yu